michaelh/ch32ima
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A Zephyr based RISC-V RV32IMA emulator
27 commits 1 branch 0 tags 91 KiB
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Michael Hope 6db5422fe7
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ch81: split the PSRAM driver out to a class
2025-10-27 20:07:25 +01:00
.forgejo/workflows ch81: add a build workflow 2025-10-13 20:37:05 +02:00
boards ch81: update the UART, clock, and storage Devicetree 2025-10-18 20:23:03 +02:00
dts ch81: re-enable the earlycon so I can see early progress 2025-10-19 16:37:51 +02:00
src ch81: split the PSRAM driver out to a class 2025-10-27 20:07:25 +01:00
third_party ch81: fork experimental/rv32emu out into a separate project 2025-10-12 16:01:56 +02:00
tools ch81: change to switch based dispatch 2025-10-27 19:52:44 +01:00
.clang-format ch81: fork experimental/rv32emu out into a separate project 2025-10-12 16:01:56 +02:00
.gitignore ch81: fork experimental/rv32emu out into a separate project 2025-10-12 16:01:56 +02:00
.gitmodules ch81: fork experimental/rv32emu out into a separate project 2025-10-12 16:01:56 +02:00
CMakeLists.txt ch81: split the PSRAM driver out to a class 2025-10-27 20:07:25 +01:00
prj.conf ch81: split the PSRAM driver out to a class 2025-10-27 20:07:25 +01:00
west.yml ch81: add a build workflow 2025-10-13 20:37:05 +02:00