Michael Hope michaelh
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michaelh pushed to main at michaelh/zephyr-ci 2025-10-25 16:11:38 +02:00
dd3a619dad ci: fix up the init/update/requirements split
michaelh pushed to main at michaelh/zephyr-ci 2025-10-25 16:03:05 +02:00
ebfae64bba ci: add a daily build
michaelh pushed to main at michaelh/zephyr-ci 2025-10-25 16:00:42 +02:00
d32005b007 ci: add a matrix of builds
michaelh pushed to main at michaelh/zephyr-ci 2025-10-25 15:55:03 +02:00
5a61a27c21 ci: add a matrix of builds
michaelh created branch main in michaelh/zephyr-ci 2025-10-25 15:47:35 +02:00
michaelh pushed to main at michaelh/zephyr-ci 2025-10-25 15:47:35 +02:00
c7bd2cd61e ci: add a continious build for the ch32v006evt
michaelh created repository michaelh/zephyr-ci 2025-10-25 15:39:09 +02:00
michaelh synced commits to main at michaelh/hugo-academic-mirror from mirror 2025-10-25 06:55:53 +02:00
323f1122b7 feat: improve card view footer
482b7a8205 feat: add 'emoji' icon pack support
0f474b371f feat: show author name rather than username in terms/taxonomy layout
c34ccd27b0 feat: add new blocks
Compare 4 commits »
michaelh synced commits to main at michaelh/hugo-academic-mirror from mirror 2025-10-24 22:45:53 +02:00
5f2290d590 starters: standardise starters dir name to templates
michaelh created branch fix-compile in michaelh/zephyr 2025-10-24 19:44:25 +02:00
michaelh pushed to fix-compile at michaelh/zephyr 2025-10-24 19:44:25 +02:00
41cbf928a2 drivers: clock_control: fix the ch32v003/006 build
michaelh pushed to ch81 at michaelh/zephyr 2025-10-24 19:17:57 +02:00
384acf54ea drivers: spi: optimise the WCH transcieve for common situations
22248c00c2 DNS: psram
1969d2f945 drivers: hwinfo: add a WCH ESIG hardware ID driver
7e8bc7f4c2 drivers: pwm: add support for the CH32V Advanced-control Timer (ADTM)
9736d27c1e samples: led: fix the CH32V003 overlay
Compare 1114 commits »
michaelh pushed to main at michaelh/zephyr 2025-10-24 19:15:48 +02:00
b25a218738 west.yml: Update NXP HAL to get fix for Build failure
40c9653c6d soc: silabs: siwx91x: increase main stack size when nwp is active
ba35b4d076 driver: uart: stm32: Disable UART DMA before shutdown
0a878179f7 drivers: mipi-dbi-spi: Fix initialization of GPIO CS
298a35b714 modules: tf-m: Remove some download Kconfigs
Compare 1107 commits »
michaelh synced commits to main at michaelh/hugo-academic-mirror from mirror 2025-10-24 06:25:53 +02:00
20a6f8202e fix: linting
michaelh synced commits to refs/tags/modules/blox-tailwind/v0.9.0 at michaelh/hugo-academic-mirror from mirror 2025-10-23 22:15:53 +02:00
michaelh synced new reference refs/tags/modules/blox-tailwind/v0.9.0 to michaelh/hugo-academic-mirror from mirror 2025-10-23 22:15:53 +02:00
michaelh synced commits to main at michaelh/hugo-academic-mirror from mirror 2025-10-23 22:15:53 +02:00
692dc8c62e feat: re-designed search UI and new FAQ and Q&A blocks
3eef2cba11 chore(starters): bump modules and Hugo
d9f1a8428c chore(blox-tailwind): prepare v0.9.0
Compare 3 commits »
michaelh pushed to main at michaelh/ch32ima 2025-10-23 20:31:46 +02:00
42bc0f1d7a ch81: move the cache statistics to members; increase the timer rate
9c27a529ce ch81: change to switch based dispatch
a83d166867 ch81: test for exit on jump instead of every instruction
028829dce8 ch81: refactor the instructions out of the dispatch
11835b5ec1 ch81: compensate for the QEMU clock running fast and the CH32V being too slow
Compare 12 commits »
michaelh synced commits to main at michaelh/hugo-academic-mirror from mirror 2025-10-22 05:35:54 +02:00
38be016452 ci(build-starters-matrix): prevent spurious cancellations by scoping concurrency per workflow+PR and restricting PR event types
2e6abec624
 fix: for code scanning alert no. 10: Double escaping or unescaping (#3283)
8b7392b56d
 feat: add support for displaying organization logos (#3282)
cdee5c8997
 fix: regression with custom icon rendering (#3279)
ad44e76171 starters: move file
Compare 5 commits »
michaelh synced and deleted reference refs/tags/dependabot/github_actions/actions/setup-node-6 at michaelh/hugo-academic-mirror from mirror 2025-10-21 21:35:52 +02:00