fd26514a4d
STM32Lx LPUART peripherals do not fit well into existing U(S)ART port numbering scheme, so there will be two separate namespaces in Kconfig: one for U(S)ARTs and one for LPUARTs. Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
64 lines
3.9 KiB
Text
64 lines
3.9 KiB
Text
/* SoC level DTS fixup file */
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS
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#define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED
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#define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY
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#define CONFIG_UART_STM32_USART_1_NAME ST_STM32_USART_40013800_LABEL
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#define USART_1_IRQ ST_STM32_USART_40013800_IRQ_0
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#define CONFIG_UART_STM32_USART_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
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#define CONFIG_UART_STM32_USART_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED
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#define CONFIG_UART_STM32_USART_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
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#define CONFIG_UART_STM32_USART_2_NAME ST_STM32_USART_40004400_LABEL
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#define USART_2_IRQ ST_STM32_USART_40004400_IRQ_0
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#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS
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#define CONFIG_I2C_1_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
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#define CONFIG_I2C_1_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
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#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL
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#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V2_40005400_IRQ_EVENT
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#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V2_40005400_IRQ_ERROR
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#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
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#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
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#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
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#define CONFIG_I2C_2_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
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#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL
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#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V2_40005800_IRQ_EVENT
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#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V2_40005800_IRQ_ERROR
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#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
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#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
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#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY
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#define CONFIG_SPI_1_NAME ST_STM32_SPI_FIFO_40013000_LABEL
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#define CONFIG_SPI_1_IRQ ST_STM32_SPI_FIFO_40013000_IRQ_0
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#define CONFIG_SPI_2_BASE_ADDRESS ST_STM32_SPI_FIFO_40003800_BASE_ADDRESS
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#define CONFIG_SPI_2_IRQ_PRI ST_STM32_SPI_FIFO_40003800_IRQ_0_PRIORITY
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#define CONFIG_SPI_2_NAME ST_STM32_SPI_FIFO_40003800_LABEL
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#define CONFIG_SPI_2_IRQ ST_STM32_SPI_FIFO_40003800_IRQ_0
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#define CONFIG_SPI_3_BASE_ADDRESS ST_STM32_SPI_FIFO_40003C00_BASE_ADDRESS
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#define CONFIG_SPI_3_IRQ_PRI ST_STM32_SPI_FIFO_40003C00_IRQ_0_PRIORITY
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#define CONFIG_SPI_3_NAME ST_STM32_SPI_FIFO_40003C00_LABEL
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#define CONFIG_SPI_3_IRQ ST_STM32_SPI_FIFO_40003C00_IRQ_0
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#define CONFIG_SPI_4_BASE_ADDRESS ST_STM32_SPI_FIFO_40013C00_BASE_ADDRESS
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#define CONFIG_SPI_4_IRQ_PRI ST_STM32_SPI_FIFO_40013C00_IRQ_0_PRIORITY
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#define CONFIG_SPI_4_NAME ST_STM32_SPI_FIFO_40013C00_LABEL
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#define CONFIG_SPI_4_IRQ ST_STM32_SPI_FIFO_40013C00_IRQ_0
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#define FLASH_DEV_BASE_ADDRESS ST_STM32F3_FLASH_CONTROLLER_40022000_BASE_ADDRESS
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#define FLASH_DEV_NAME ST_STM32F3_FLASH_CONTROLLER_40022000_LABEL
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#define CONFIG_USB_BASE_ADDRESS ST_STM32_USB_40005C00_BASE_ADDRESS
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#define CONFIG_USB_IRQ ST_STM32_USB_40005C00_IRQ_USB
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#define CONFIG_USB_IRQ_PRI ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
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#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
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#define CONFIG_USB_NUM_IN_ENDPOINTS ST_STM32_USB_40005C00_NUM_IN_ENDPOINTS
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#define CONFIG_USB_NUM_OUT_ENDPOINTS ST_STM32_USB_40005C00_NUM_OUT_ENDPOINTS
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#define CONFIG_USB_RAM_SIZE ST_STM32_USB_40005C00_RAM_SIZE
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/* End of SoC Level DTS fixup file */
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