c25d6c5d63
A special situation may occur when a processor raises its task priority to be greater than or equal to the level of the interrupt for which the processor INTR signal is currently being asserted. If at the time the INTA cycle is issued, the interrupt that was to be dispensed has become masked (programmed by software), the local APIC will deliver a spurious-interrupt vector. Dispensing the spurious-interrupt vector does not affect the ISR, so the handler for this vector should return without an EOI. Change-Id: I4cf4744bd6efd68b72e2c380269de4181dc80bd9 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
31 lines
829 B
ArmAsm
31 lines
829 B
ArmAsm
/*
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* Copyright (c) 2015 Intel Corporation
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief LOAPIC spurioys interrupt handler
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*/
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#define _ASMLANGUAGE
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#include <nano_private.h>
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#include <arch/x86/asm.h>
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GTEXT(_loapic_spurious_handler)
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SECTION_FUNC(TEXT, _loapic_spurious_handler)
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iret
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