Erwan Gouriou 79edb8b632 dts: stm32wb: Limit flash size to 812K ... stm32wb55rg is a dual core SoC (M4/M0) with a radio/protocol stack running on M0 core. M0 FW starts at flash address 0x80CB000. So flash size available to zephyr is 812K instead of 1M. Configure package size to reflect this (flash size is now 812K) and update MPU setting to exclude M0 FW. From MPU point of view, we set flash size to 512K since we should chose a size being a power of 2. If we consider there will be 2 images partitions in a FOTA scheme, 512 K is beyond image-0 and hence is sufficient to cover application image. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>		2019-06-03 09:38:19 -04:00
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arm_mpu_mem_cfg.h	dts: stm32wb: Limit flash size to 812K	2019-06-03 09:38:19 -04:00
arm_mpu_regions.c	soc: arm: stm32: Updated SRAM Region Definitions	2019-04-24 11:06:41 -05:00
ccm.ld	soc: arm: st_stm32: Port CCM sections to use the Cmake function	2019-05-20 22:28:28 -04:00
CMakeLists.txt	soc: arm: st_stm32: Port CCM sections to use the Cmake function	2019-05-20 22:28:28 -04:00
Kconfig.defconfig.series	drivers: adc: add driver support for ADC1 of stm32	2019-05-07 23:15:58 -04:00
stm32cube_hal.c	arm: soc: move arm SoCs to top-dir	2018-09-13 00:56:48 -04:00