f384a86cc9
Fix board DTS coding style issues to prevent them from spreading when a new board is introduced and uses an existing DTS as a referance. Issues addressed from Zephyr devicetree style guidelines [1]: - Don’t insert empty lines before a deindenting };. - Insert a single empty line to separate nodes at the same hierarchy level. - status is "okay" by default. - compatible property comes first in node. - reg property comes second in node. - status property comes last in node. - the rest of the properties within are nodes naturally sorted. - child nodes are sorted by address or alphabetically if there is no address. No functional change. Link: https://docs.zephyrproject.org/latest/contribute/style/devicetree.html [1] Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
183 lines
2.6 KiB
Text
183 lines
2.6 KiB
Text
/*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*
|
|
* Copyright (c) 2024 Capgemini
|
|
*
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include <silabs/xg21/efr32mg21a020f1024im32.dtsi>
|
|
#include <zephyr/dt-bindings/input/input-event-codes.h>
|
|
#include "slwrb4180b-pinctrl.dtsi"
|
|
|
|
/ {
|
|
model = "Silicon Labs BRD4180B (Wireless Gecko 21 Radio Board)";
|
|
compatible = "silabs,slwrb4180b", "silabs,efr32mg21";
|
|
|
|
chosen {
|
|
zephyr,code-partition = &slot0_partition;
|
|
zephyr,console = &usart0;
|
|
zephyr,flash = &flash0;
|
|
zephyr,shell-uart = &usart0;
|
|
zephyr,sram = &sram0;
|
|
};
|
|
|
|
/* These aliases are provided for compatibility with samples */
|
|
aliases {
|
|
led0 = &led0;
|
|
led1 = &led1;
|
|
sw0 = &button0;
|
|
sw1 = &button1;
|
|
watchdog0 = &wdog0;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led0: led_0 {
|
|
gpios = <&gpiod 2 0>;
|
|
label = "LED0";
|
|
};
|
|
|
|
led1: led_1 {
|
|
gpios = <&gpiod 3 0>;
|
|
label = "LED1";
|
|
};
|
|
};
|
|
|
|
buttons {
|
|
compatible = "gpio-keys";
|
|
|
|
button0: button_0 {
|
|
gpios = <&gpiob 0 GPIO_ACTIVE_LOW>;
|
|
label = "BTN0";
|
|
zephyr,code = <INPUT_KEY_0>;
|
|
};
|
|
|
|
button1: button_1 {
|
|
gpios = <&gpiob 1 GPIO_ACTIVE_LOW>;
|
|
label = "BTN1";
|
|
zephyr,code = <INPUT_KEY_1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&cpu0 {
|
|
clock-frequency = <76800000>;
|
|
};
|
|
|
|
&hfxo {
|
|
ctune = <129>;
|
|
precision = <50>;
|
|
status = "okay";
|
|
};
|
|
|
|
&lfxo {
|
|
ctune = <79>;
|
|
precision = <50>;
|
|
status = "okay";
|
|
};
|
|
|
|
&hfrcodpll {
|
|
clock-frequency = <DT_FREQ_K(76800)>;
|
|
clocks = <&hfxo>;
|
|
dpll-autorecover;
|
|
dpll-edge = "fall";
|
|
dpll-lock = "phase";
|
|
dpll-m = <1919>;
|
|
dpll-n = <3839>;
|
|
};
|
|
|
|
&em23grpaclk {
|
|
clocks = <&lfxo>;
|
|
};
|
|
|
|
&em4grpaclk {
|
|
clocks = <&lfxo>;
|
|
};
|
|
|
|
&rtccclk {
|
|
clocks = <&lfxo>;
|
|
};
|
|
|
|
&wdog0clk {
|
|
clocks = <&lfxo>;
|
|
};
|
|
|
|
&wdog1clk {
|
|
clocks = <&lfxo>;
|
|
};
|
|
|
|
&usart0 {
|
|
current-speed = <115200>;
|
|
pinctrl-0 = <&usart0_default>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
};
|
|
|
|
&rtcc0 {
|
|
prescaler = <1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpioa {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpiob {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpioc {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpiod {
|
|
status = "okay";
|
|
|
|
board-controller-enable {
|
|
gpio-hog;
|
|
gpios = <4 GPIO_ACTIVE_HIGH>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
&wdog0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&dma0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&flash0 {
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
boot_partition: partition@0 {
|
|
reg = <0x00000000 DT_SIZE_K(48)>;
|
|
label = "mcuboot";
|
|
};
|
|
|
|
slot0_partition: partition@c000 {
|
|
reg = <0x0000C000 DT_SIZE_K(472)>;
|
|
label = "image-0";
|
|
};
|
|
|
|
slot1_partition: partition@82000 {
|
|
reg = <0x00082000 DT_SIZE_K(472)>;
|
|
label = "image-1";
|
|
};
|
|
|
|
storage_partition: partition@F8000 {
|
|
reg = <0x000F8000 DT_SIZE_K(32)>;
|
|
label = "storage";
|
|
};
|
|
};
|
|
};
|