e81e92dbb9
The boards folder uses ~142.8 MB, being the largest in the repository.
This is due mostly to board images, which are in most cases not
optimized for web content. This patch tries to address this problem by
converting all pictures to JPEG (quality 75) and by adjusting its size
up to 750 px (the width of the documentation content). Images that
specified a fixed width in rst files are converted down to that value
instead.
With this patch, folder goes down to ~53.5 MB from 142.8 MB (-~63%).
Note that this patch introduces a new set of binary files to git
history, though (bad).
The process has been automated using this quickly crafted Python script:
```python
from pathlib import Path
import re
import subprocess
def process(doc, image, image_jpeg, size):
subprocess.run(
(
f"convert {image}"
"-background white -alpha remove -alpha off -quality 75"
f"-resize {size}\> {image_jpeg}"
),
shell=True,
check=True,
cwd=doc.parent,
)
if image != image_jpeg:
(doc.parent / image).unlink()
for doc in Path(".").glob("boards/**/*.rst"):
with open(doc) as f:
content = ""
image = None
for line in f:
m = re.match(r"^(\s*)\.\. (image|figure):: (.*)$", line)
if m:
if image:
process(doc, image, image_jpeg, size)
image = Path(m.group(3))
if image.suffix not in (".jpg", ".jpeg", ".png"):
content += line
image = None
continue
image_jpeg = image.parent / (image.stem + ".jpg")
size = 750
content += (
f"{m.group(1)}.. {m.group(2)}:: {image_jpeg}\n"
)
elif image:
m = re.match(r"\s*:height:\s*[0-9]+.*$", line)
if m:
continue
m = re.match(r"\s*:width:\s*([0-9]+).*$", line)
if m:
size = min(int(m.group(1)), size)
continue
content += line
if line == "\n":
process(doc, image, image_jpeg, size)
image = None
else:
content += line
with open(doc, "w") as f:
f.write(content)
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
279 lines
9.2 KiB
ReStructuredText
279 lines
9.2 KiB
ReStructuredText
.. _96b_avenger96:
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96Boards Avenger96
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##################
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Overview
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********
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96Boards Avenger96 board is based on ST Microelectronics STM32MP157A
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multi-core processor, composed of a dual Cortex®-A7 and a single Cortex®-M4
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core. Zephyr OS is ported to run on the Cortex®-M4 core.
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- Board features:
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- PMIC: STPMIC1A
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- RAM: 1024 Mbyte @ 533MHz
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- Storage:
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- eMMC: v4.51: 8 Gbyte
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- QSPI: 2Mbyte
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- EEPROM: 128 byte
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- microSD Socket: UHS-1 v3.01
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- Ethernet: 10/100/1000 Mbit/s, IEEE 802.3 Compliant
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- Wireless:
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- WiFi: 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac
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- Bluetooth: v4.2 (BR/EDR/BLE)
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- USB:
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- Host - 2x type A, 2.0 high-speed
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- OTG: - 1x type micro-AB, 2.0 high-speed
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- HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4
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- Connectors:
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- 40-Pin Low Speed Header
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- 60-Pin High Speed Header
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- LEDs:
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- 4x Green user LEDs
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- 1x Blue Bluetooth LED
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- 1x Yellow WiFi LED
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- 1x Red power supply LED
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.. image:: img/96b_avenger96.jpg
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:align: center
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:alt: 96Boards Avenger96
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More information about the board can be found at the
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`96Boards website`_.
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Hardware
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********
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The STM32MP157A SoC provides the following hardware capabilities:
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- Core:
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- 32-bit dual-core Arm® Cortex®-A7
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- L1 32-Kbyte I / 32-Kbyte D for each core
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- 256-Kbyte unified level 2 cache
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- Arm® NEON™
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- 32-bit Arm® Cortex®-M4 with FPU/MPU
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- Up to 209 MHz (Up to 703 CoreMark®)
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- Memories:
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- External DDR memory up to 1 Gbyte.
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- 708 Kbytes of internal SRAM: 256 KB of AXI SYSRAM + 384 KB of AHB SRAM +
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64 KB of AHB SRAM in backup domain.
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- Dual mode Quad-SPI memory interface
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- Flexible external memory controller with up to 16-bit data bus
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- Clock management:
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- Internal oscillators: 64 MHz HSI oscillator, 4 MHz CSI oscillator, 32 kHz
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LSI oscillator
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- External oscillators: 8-48 MHz HSE oscillator, 32.768 kHz LSE oscillator
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- 6 × PLLs with fractional mode
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- General-purpose input/outputs:
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- Up to 176 I/O ports with interrupt capability
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- Interconnect matrix
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- 3 DMA controllers
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- Communication peripherals:
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- 6 × I2C FM+ (1 Mbit/s, SMBus/PMBus)
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- 4 × UART + 4 × USART (12.5 Mbit/s, ISO7816 interface, LIN, IrDA, SPI slave)
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- 6 × SPI (50 Mbit/s, including 3 with full duplex I2S audio class accuracy)
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- 4 × SAI (stereo audio: I2S, PDM, SPDIF Tx)
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- SPDIF Rx with 4 inputs
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- HDMI-CEC interface
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- MDIO Slave interface
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- 3 × SDMMC up to 8-bit (SD / e•MMC™ / SDIO)
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- 2 × CAN controllers supporting CAN FD protocol, TTCAN capability
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- 2 × USB 2.0 high-speed Host+ 1 × USB 2.0 full-speed OTG simultaneously
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- 10/100M or Gigabit Ethernet GMAC (IEEE 1588v2 hardware, MII/RMII/GMII/RGMI)
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- 8- to 14-bit camera interface up to 140 Mbyte/s
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- 6 analog peripherals
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- 2 × ADCs with 16-bit max. resolution.
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- 1 × temperature sensor
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- 2 × 12-bit D/A converters (1 MHz)
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- 1 × digital filters for sigma delta modulator (DFSDM) with 8 channels/6
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filters
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- Internal or external ADC/DAC reference VREF+
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- Graphics:
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- 3D GPU: Vivante® - OpenGL® ES 2.0
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- LCD-TFT controller, up to 24-bit // RGB888, up to WXGA (1366 × 768) @60 fps
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- MIPI® DSI 2 data lanes up to 1 GHz each
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- Timers:
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- 2 × 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature
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(incremental) encoder input
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- 2 × 16-bit advanced motor control timers
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- 10 × 16-bit general-purpose timers (including 2 basic timers without PWM)
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- 5 × 16-bit low-power timers
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- RTC with sub-second accuracy and hardware calendar
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- 2 × 4 Cortex®-A7 system timers (secure, non-secure, virtual, hypervisor)
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- 1 × SysTick Cortex®-M4 timer
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- Hardware acceleration:
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- HASH (MD5, SHA-1, SHA224, SHA256), HMAC
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- 2 × true random number generator (3 oscillators each)
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- 2 × CRC calculation unit
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- Debug mode:
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- Arm® CoreSight™ trace and debug: SWD and JTAG interfaces
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- 8-Kbyte embedded trace buffer
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- 3072-bit fuses including 96-bit unique ID, up to 1184-bit available for user
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More information about STM32P157A can be found here:
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- `STM32MP157A on www.st.com`_
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- `STM32MP157A reference manual`_
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Supported Features
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==================
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The Zephyr 96b_avenger96 board configuration supports the following hardware
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features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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``boards/arm/96b_avenger96/96b_avenger96_defconfig``
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Connections and IOs
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===================
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96Boards Avenger96 Board schematic is available here:
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`Avenger96 board schematics`_.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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- UART_7 TX/RX/RTS/CTS : PE8/PE7/PE9/PE10 (UART console)
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- UART_4 TX/RX : PD1/PB2
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System Clock
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------------
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The Cortex®-M4 Core is configured to run at a 209 MHz clock speed. This value
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must match the configured mlhclk_ck frequency.
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Serial Port
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-----------
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96Boards Avenger96 board has 3 U(S)ARTs. The Zephyr console output is assigned
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by default to the RAM console to be dumped by the Linux Remoteproc Framework
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on Cortex®-A7 core. Alternatively, Zephyr console output can be assigned to
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UART7 which is disabled by default. UART console can be enabled through
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board's devicetree and 96b_avenger96_defconfig board file (or prj.conf
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project files), and will disable existing RAM console output. Default UART
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console settings are 115200 8N1.
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Programming and Debugging
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*************************
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The STM32MP157A doesn't have QSPI flash for the Cortex®-M4 and it needs to be
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started by the Cortex®-A7 core. The Cortex®-A7 core is responsible to load the
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Cortex®-M4 binary application into the RAM, and get the Cortex®-M4 out of reset.
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The Cortex®-A7 can perform these steps at bootloader level or after the Linux
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system has booted.
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The Cortex®-M4 can use up to 2 different RAMs. The program pointer starts at
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address 0x00000000 (RETRAM), the vector table should be loaded at this address
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These are the memory mappings for Cortex®-A7 and Cortex®-M4:
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+------------+-----------------------+------------------------+----------------+
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| Region | Cortex®-A7 | Cortex®-M4 | Size |
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+============+=======================+========================+================+
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| RETRAM | 0x38000000-0x3800FFFF | 0x00000000-0x0000FFFF | 64KB |
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+------------+-----------------------+------------------------+----------------+
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| MCUSRAM | 0x10000000-0x1005FFFF | 0x10000000-0x1005FFFF | 384KB |
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+------------+-----------------------+------------------------+----------------+
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| DDR | 0xC0000000-0xFFFFFFFF | | up to 1 GB |
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+------------+-----------------------+------------------------+----------------+
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Refer to `stm32mp157 boot Cortex-M4 firmware`_ wiki page for instruction
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to load and start the Cortex-M4 firmware.
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Debugging
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=========
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You can debug an application using OpenOCD and GDB. The Solution proposed below
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is based on the Linux STM32MP1 SDK OpenOCD and is available only for a Linux
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environment. The firmware must first be loaded by the Cortex®-A7. Developer
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then attaches the debugger to the running Zephyr using OpenOCD.
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Prerequisite
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------------
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install `stm32mp1 developer package`_.
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1) start OpenOCD in a dedicated terminal
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- Start up the sdk environment::
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source <SDK installation directory>/environment-setup-cortexa7hf-neon-vfpv4-openstlinux_weston-linux-gnueabi
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- Start OpenOCD::
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${OECORE_NATIVE_SYSROOT}/usr/bin/openocd -s ${OECORE_NATIVE_SYSROOT}/usr/share/openocd/scripts -f board/stm32mp15x_ev1_jlink_jtag.cfg
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2) run gdb in Zephyr environment
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.. code-block:: console
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# On Linux
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cd $ZEPHYR_BASE/samples/hello_world
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mkdir -p build && cd build
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# Use cmake to configure a Ninja-based build system:
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cmake -GNinja -DBOARD=96b_avenger96 ..
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# Now run ninja on the generated build system:
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ninja debug
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.. _96Boards website:
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https://www.96boards.org/product/avenger96/
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.. _STM32MP157A on www.st.com:
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https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-arm-cortex-mpus/stm32mp1-series/stm32mp157/stm32mp157a.html
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.. _STM32MP157A reference manual:
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https://www.st.com/resource/en/reference_manual/DM00327659.pdf
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.. _Avenger96 board schematics:
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https://www.96boards.org/documentation/consumer/avenger96/hardware-docs/files/avenger96-schematics.pdf
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.. _stm32mp1 developer package:
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https://wiki.st.com/stm32mpu/index.php/STM32MP1_Developer_Package#Installing_the_SDK
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.. _stm32mp157 boot Cortex-M4 firmware:
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https://wiki.st.com/stm32mpu/index.php/Linux_remoteproc_framework_overview#How_to_use_the_framework
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