e605efc698
add clock control driver support for esp32s2 SoC. Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
129 lines
2.8 KiB
Text
129 lines
2.8 KiB
Text
/*
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* Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <xtensa/xtensa.dtsi>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/esp32s2_clock.h>
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#include <dt-bindings/interrupt-controller/esp32s2-xtensa-intmux.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "cdns,tensilica-xtensa-lx7";
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reg = <0>;
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clock-source = <ESP32_CLK_SRC_PLL>;
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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sram0: memory@3ffb0000 {
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compatible = "mmio-sram";
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reg = <0x3ffb0000 0x50000>;
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};
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intc: interrupt-controller@3f4c2000 {
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#interrupt-cells = <1>;
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compatible = "espressif,esp32-intc";
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interrupt-controller;
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reg = <0x3f4c2000 0x114>;
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label = "INTC_0";
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status = "okay";
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};
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rtc: rtc@3f408000 {
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compatible = "espressif,esp32-rtc";
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reg = <0x3f408000 0x0D8>;
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label = "RTC";
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xtal-freq = <ESP32_CLK_XTAL_40M>;
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xtal-div = <0>;
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#clock-cells = <1>;
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status = "ok";
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};
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uart0: uart@3f400000 {
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compatible = "espressif,esp32s2-uart";
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reg = <0x3f400000 0x400>;
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label = "UART_0";
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status = "disabled";
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};
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pinmux: pinmux@3f409000 {
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compatible = "espressif,esp32-pinmux";
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reg = <0x3f409000 0x94>;
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};
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gpio0: gpio@3f404000 {
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compatible = "espressif,esp32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x3f404000 0x800>;
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interrupts = <GPIO_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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label = "GPIO_0";
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ngpios = <32>; /* 0..31 */
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};
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gpio1: gpio@3f404800 {
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compatible = "espressif,esp32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x3f404800 0x800>;
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interrupts = <GPIO_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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label = "GPIO_1";
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ngpios = <22>; /* 32..53 */
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};
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timer0: counter@3f41f000 {
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compatible = "espressif,esp32-timer";
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reg = <0x3f41f000 DT_SIZE_K(4)>;
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interrupts = <TG0_T0_LEVEL_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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label = "TIMG0_T0";
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status = "disabled";
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};
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timer1: counter@3f41f024 {
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compatible = "espressif,esp32-timer";
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reg = <0x3f41f024 DT_SIZE_K(4)>;
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interrupts = <TG0_T1_LEVEL_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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label = "TIMG0_T1";
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status = "disabled";
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};
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timer2: counter@3f420000 {
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compatible = "espressif,esp32-timer";
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reg = <0x3f420000 DT_SIZE_K(4)>;
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interrupts = <TG1_T0_LEVEL_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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label = "TIMG1_T0";
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status = "disabled";
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};
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timer3: counter@3f420024 {
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compatible = "espressif,esp32-timer";
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reg = <0x3f420024 DT_SIZE_K(4)>;
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interrupts = <TG1_T1_LEVEL_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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label = "TIMG1_T1";
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status = "disabled";
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};
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};
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};
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