e290006144
Adds a shim layer around the mcux lpuart driver to adapt it to the Zephyr serial interface. NXP has multiple uart hardware blocks that implement different features and have different register maps. The k64 has a uart block called 'uart', while the kw41 has a uart block called 'lpuart' (low power uart). The MCUXpresso SDK provides separate drivers for each type of uart block but with similar software interfaces. As a result, there are also separate shim drivers in Zephyr. There is a 1:1:1 relationship between hardware block, mcux driver, and mcux shim driver. Because we now have two mcux shim drivers for the uart interface, a new naming convention is created: <interface>_mcux_<hw block> Where <interface> is the name of the Zephyr interface, in this case 'uart'. This convention is not new. <hw block> is the name of the NXP hardware block, in this case 'lpuart'. This is the new part, and distinguishes different hardware blocks for the same interface. Change-Id: I3a80b9bffa116bbb2b02ee950d4bdd79a19a4edc Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
40 lines
686 B
Text
40 lines
686 B
Text
# Kconfig - MCUXpresso SDK LPUART
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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menuconfig UART_MCUX_LPUART
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bool "MCUX LPUART driver"
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depends on HAS_MCUX && HAS_LPUART
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default n
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select SERIAL_HAS_DRIVER
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help
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Enable the MCUX LPUART driver.
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if UART_MCUX_LPUART
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menuconfig UART_MCUX_LPUART_0
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bool "UART 0"
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default n
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help
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Enable UART 0.
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if UART_MCUX_LPUART_0
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config UART_MCUX_LPUART_0_NAME
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string "UART 0 driver name"
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default "UART_0"
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config UART_MCUX_LPUART_0_IRQ_PRI
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int "UART 0 interrupt priority"
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default 0
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config UART_MCUX_LPUART_0_BAUD_RATE
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int "UART 0 baud rate"
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default 115200
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endif # UART_MCUX_LPUART_0
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endif # UART_MCUX_LPUART
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