zephyr/arch/xtensa
Iuliana Prodan f9810ccbe1 arch: xtensa: modify asm for interrupt sections
For IMX, for timer interrupt, the interrupt handler
was not the correct one executed and that’s because
the handlers were not at the expected address.
For IMX the size constraint of the interrupt vector
table entry is 0x1C bytes of code, less than usual.

I've added a small indirection to bypass this size
constraint and moved the default handlers to the end
of vector table, renaming them to
_Level\LVL\()VectorHelper.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2021-08-28 23:27:02 -04:00
..
core arch: xtensa: Fix 10.4 violations 2021-04-10 09:59:37 -04:00
include arch: xtensa: modify asm for interrupt sections 2021-08-28 23:27:02 -04:00
CMakeLists.txt license: cleanup: add SPDX Apache-2.0 license identifier 2019-04-07 08:45:22 -04:00
Kconfig arch: xtensa: Print backtrace from panic handler 2021-01-23 08:43:10 -05:00