df77e2af8b
Adds the necessary bits to initialize TLS in the stack area and sets up CPU registers during context switch. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
162 lines
3.2 KiB
ArmAsm
162 lines
3.2 KiB
ArmAsm
/*
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* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Thread context switching for ARM64 Cortex-A
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*
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* This module implements the routines necessary for thread context switching
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* on ARM64 Cortex-A.
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*/
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#include <toolchain.h>
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#include <linker/sections.h>
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#include <offsets_short.h>
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#include <arch/cpu.h>
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#include <syscall.h>
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#include "macro_priv.inc"
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_ASM_FILE_PROLOGUE
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GDATA(_kernel)
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/**
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* @brief Routine to handle context switches
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*
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* This function is directly called either by _isr_wrapper() in case of
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* preemption, or z_arm64_svc() in case of cooperative switching.
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*/
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GTEXT(z_arm64_context_switch)
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SECTION_FUNC(TEXT, z_arm64_context_switch)
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/* addr of callee-saved regs in thread in x2 */
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ldr x2, =_thread_offset_to_callee_saved
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add x2, x2, x1
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/* Store rest of process context including x30 */
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stp x19, x20, [x2], #16
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stp x21, x22, [x2], #16
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stp x23, x24, [x2], #16
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stp x25, x26, [x2], #16
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stp x27, x28, [x2], #16
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stp x29, xzr, [x2], #16
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/* Save the current SP */
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mov x1, sp
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str x1, [x2]
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#ifdef CONFIG_THREAD_LOCAL_STORAGE
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/* Grab the TLS pointer */
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ldr x2, =_thread_offset_to_tls
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add x2, x2, x0
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ldr x2, [x2]
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/* Store in the "Thread ID" register.
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* This register is used as a base pointer to all
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* thread variables with offsets added by toolchain.
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*/
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msr tpidr_el0, x2
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#endif
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/* addr of callee-saved regs in thread in x2 */
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ldr x2, =_thread_offset_to_callee_saved
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add x2, x2, x0
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/* Restore x19-x29 */
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ldp x19, x20, [x2], #16
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ldp x21, x22, [x2], #16
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ldp x23, x24, [x2], #16
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ldp x25, x26, [x2], #16
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ldp x27, x28, [x2], #16
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ldp x29, xzr, [x2], #16
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ldr x1, [x2]
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mov sp, x1
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#ifdef CONFIG_TRACING
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stp xzr, x30, [sp, #-16]!
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bl sys_trace_thread_switched_in
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ldp xzr, x30, [sp], #16
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#endif
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/* Return to z_arm64_svc() or _isr_wrapper() */
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ret
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/**
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* @brief Service call handler
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*
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* The service call (SVC) is used in the following occasions:
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* - Cooperative context switching
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* - IRQ offloading
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*
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* @return N/A
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*/
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GTEXT(z_arm64_svc)
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SECTION_FUNC(TEXT, z_arm64_svc)
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z_arm64_enter_exc x2, x3, x4
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mrs x0, esr_el1
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lsr x1, x0, #26
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cmp x1, #0x15 /* 0x15 = SVC */
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bne inv
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/* Demux the SVC call */
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and x1, x0, #0xff
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cmp x1, #_SVC_CALL_CONTEXT_SWITCH
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beq context_switch
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#ifdef CONFIG_IRQ_OFFLOAD
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cmp x1, #_SVC_CALL_IRQ_OFFLOAD
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beq offload
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b inv
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offload:
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/* ++(_kernel->nested) to be checked by arch_is_in_isr() */
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inc_nest_counter x0, x1
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bl z_irq_do_offload
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/* --(_kernel->nested) */
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dec_nest_counter x0, x1
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b exit
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#endif
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b inv
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context_switch:
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/*
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* Retrieve x0 and x1 from the stack:
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* - x0 = new_thread->switch_handle = switch_to thread
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* - x1 = x1 = &old_thread->switch_handle = current thread
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*/
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ldp x0, x1, [sp, #(16 * 10)]
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/* Get old thread from x1 */
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sub x1, x1, ___thread_t_switch_handle_OFFSET
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/* Switch thread */
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bl z_arm64_context_switch
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exit:
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z_arm64_exit_exc x0, x1, x2
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inv:
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mov x0, #0 /* K_ERR_CPU_EXCEPTION */
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mov x1, sp
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b z_arm64_fatal_error
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GTEXT(z_arm64_call_svc)
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SECTION_FUNC(TEXT, z_arm64_call_svc)
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svc #_SVC_CALL_CONTEXT_SWITCH
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ret
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#ifdef CONFIG_IRQ_OFFLOAD
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GTEXT(z_arm64_offload)
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SECTION_FUNC(TEXT, z_arm64_offload)
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svc #_SVC_CALL_IRQ_OFFLOAD
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ret
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#endif
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