zephyr/soc/xtensa
Guennadi Liakhovetski deb57e3b85 xtensa: ADSP: fix disabling the IDC interrupt
To disable the IDC interrupt on the interrupt controller a bit
must be set in the MSD register instead of clearing the bit in
the MCD register, which has no effect.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-05-03 17:13:01 -04:00
..
esp32 driver: esp32: add bluetooth support 2021-04-30 16:51:30 -04:00
intel_adsp xtensa: ADSP: fix disabling the IDC interrupt 2021-05-03 17:13:01 -04:00
intel_s1000 soc: intel_s1000: remove log and ztest XCC fixes 2021-03-26 11:19:52 -05:00
sample_controller xtensa: set toolchain variant per SoC 2020-12-20 14:30:50 -05:00
CMakeLists.txt soc/xtensa/intel_adsp: Upstream updates 2020-10-21 06:38:53 -04:00