dd1a9559be
Update Microchip XEC RTOS timer driver adding MEC172x support and using more device tree properities in the driver. We must also update the XEC counter driver to use the new GIRQ DT properties. Add new properties to RTOS timer and RTC timer YAML. These two timers are linked due to option using a high speed timer for kernel busy wait. Add Kconfig logic for XEC RTOS timer to MEC172x SoC. Enable the Microchip XEC RTOS timer in the MEC172x evaluation board. Add device tree nodes for most peripeherals. Signed-off-by: Scott Worley <scott.worley@microchip.com>
54 lines
986 B
YAML
54 lines
986 B
YAML
# Copyright (c) 2019, Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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description: Microchip XEC basic timer
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compatible: "microchip,xec-timer"
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include: rtc.yaml
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properties:
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reg:
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required: true
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interrupts:
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required: true
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clock-frequency:
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required: true
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prescaler:
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type: int
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required: true
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description: Timer frequency equals clock-frequency divided by the prescaler value
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max-value:
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type: int
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required: true
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description: Maximum counter value the instance can handle
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girqs:
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type: array
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required: true
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description: Array of GIRQ numbers [8:26] and bit positions [0:31].
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pcrs:
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type: array
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required: true
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description: PCR sleep enable register index and bit position.
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"girqs-cells":
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type: int
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const: 2
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"#pcrs-cells":
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type: int
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const: 2
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girqs-cells:
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- girq_num
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- bitpos
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pcrs-cells:
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- reg_index
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- bitpos
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