aaf93205bb
This commit renames the Kconfig `FP_SHARING` symbol to `FPU_SHARING`, since this symbol specifically refers to the hardware FPU sharing support by means of FPU context preservation, and the "FP" prefix is not fully descriptive of that; leaving room for ambiguity. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
134 lines
3.6 KiB
C
134 lines
3.6 KiB
C
/*
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* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <ksched.h>
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void z_thread_entry_wrapper(k_thread_entry_t thread,
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void *arg1,
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void *arg2,
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void *arg3);
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void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
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size_t stack_size, k_thread_entry_t thread_func,
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void *arg1, void *arg2, void *arg3,
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int priority, unsigned int options)
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{
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char *stack_memory = Z_THREAD_STACK_BUFFER(stack);
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struct __esf *stack_init;
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z_new_thread_init(thread, stack_memory, stack_size);
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/* Initial stack frame for thread */
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stack_init = (struct __esf *)
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Z_STACK_PTR_ALIGN(stack_memory +
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stack_size - sizeof(struct __esf));
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/* Setup the initial stack frame */
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stack_init->a0 = (ulong_t)thread_func;
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stack_init->a1 = (ulong_t)arg1;
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stack_init->a2 = (ulong_t)arg2;
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stack_init->a3 = (ulong_t)arg3;
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/*
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* Following the RISC-V architecture,
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* the MSTATUS register (used to globally enable/disable interrupt),
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* as well as the MEPC register (used to by the core to save the
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* value of the program counter at which an interrupt/exception occcurs)
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* need to be saved on the stack, upon an interrupt/exception
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* and restored prior to returning from the interrupt/exception.
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* This shall allow to handle nested interrupts.
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*
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* Given that context switching is performed via a system call exception
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* within the RISCV architecture implementation, initially set:
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* 1) MSTATUS to MSTATUS_DEF_RESTORE in the thread stack to enable
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* interrupts when the newly created thread will be scheduled;
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* 2) MEPC to the address of the z_thread_entry_wrapper in the thread
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* stack.
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* Hence, when going out of an interrupt/exception/context-switch,
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* after scheduling the newly created thread:
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* 1) interrupts will be enabled, as the MSTATUS register will be
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* restored following the MSTATUS value set within the thread stack;
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* 2) the core will jump to z_thread_entry_wrapper, as the program
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* counter will be restored following the MEPC value set within the
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* thread stack.
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*/
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stack_init->mstatus = MSTATUS_DEF_RESTORE;
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#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
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if ((thread->base.user_options & K_FP_REGS) != 0) {
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stack_init->mstatus |= MSTATUS_FS_INIT;
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}
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stack_init->fp_state = 0;
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#endif
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stack_init->mepc = (ulong_t)z_thread_entry_wrapper;
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thread->callee_saved.sp = (ulong_t)stack_init;
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}
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#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
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int arch_float_disable(struct k_thread *thread)
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{
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unsigned int key;
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if (thread != _current) {
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return -EINVAL;
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}
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if (arch_is_in_isr()) {
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return -EINVAL;
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}
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/* Ensure a preemptive context switch does not occur */
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key = irq_lock();
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/* Disable all floating point capabilities for the thread */
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thread->base.user_options &= ~K_FP_REGS;
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/* Clear the FS bits to disable the FPU. */
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__asm__ volatile (
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"mv t0, %0\n"
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"csrrc x0, mstatus, t0\n"
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:
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: "r" (MSTATUS_FS_MASK)
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);
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irq_unlock(key);
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return 0;
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}
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int arch_float_enable(struct k_thread *thread)
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{
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unsigned int key;
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if (thread != _current) {
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return -EINVAL;
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}
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if (arch_is_in_isr()) {
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return -EINVAL;
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}
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/* Ensure a preemptive context switch does not occur */
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key = irq_lock();
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/* Enable all floating point capabilities for the thread. */
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thread->base.user_options |= K_FP_REGS;
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/* Set the FS bits to Initial to enable the FPU. */
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__asm__ volatile (
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"mv t0, %0\n"
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"csrrs x0, mstatus, t0\n"
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:
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: "r" (MSTATUS_FS_INIT)
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);
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irq_unlock(key);
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return 0;
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}
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#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
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