d97d440b3f
Fixes several adi boards that incorrectly used pinctrl flags instead of gpio flags in their devicetrees. For max32662evkit and max32672evkit, the flags are removed entirely because these socs don't support gpio voltage selection. Signed-off-by: Maureen Helm <maureen.helm@analog.com>
162 lines
2.9 KiB
Text
162 lines
2.9 KiB
Text
/*
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* Copyright (c) 2024 Analog Devices, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <adi/max32/max32672.dtsi>
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#include <adi/max32/max32672-pinctrl.dtsi>
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#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
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/ {
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model = "Analog Devices MAX32672EVKIT";
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compatible = "adi,max32672evkit";
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chosen {
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zephyr,console = &uart0;
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zephyr,shell-uart = &uart0;
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zephyr,sram = &sram3;
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zephyr,flash = &flash0;
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zephyr,display = &st7735;
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};
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leds {
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compatible = "gpio-leds";
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led1: led_1 {
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gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
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label = "Red LED";
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};
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led2: led_2 {
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gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
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label = "Green LED";
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};
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};
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buttons {
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compatible = "gpio-keys";
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pb1: pb1 {
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gpios = <&gpio0 18 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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label = "SW3";
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zephyr,code = <INPUT_KEY_0>;
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};
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};
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/* These aliases are provided for compatibility with samples */
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aliases {
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led0 = &led1;
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led1 = &led2;
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sw0 = &pb1;
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watchdog0 = &wdt0;
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};
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mipi_dbi {
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compatible = "zephyr,mipi-dbi-spi";
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/* Enable D/C line for 4wire mode */
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/* dc-gpios = <&gpio0 19 (GPIO_ACTIVE_HIGH | MAX32_GPIO_VSEL_VDDIOH)>; */
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spi-dev = <&spi0>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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st7735: st7735@0 {
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compatible = "sitronix,st7735r";
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mipi-max-frequency = <DT_FREQ_M(6)>;
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mipi-mode = "MIPI_DBI_MODE_SPI_3WIRE";
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reg = <0>;
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width = <130>;
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height = <132>;
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x-offset = <0>;
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y-offset = <0>;
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madctl = <0xc0>;
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colmod = <0x05>;
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vmctr1 = <0x51>;
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pwctr1 = [02 02];
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pwctr2 = [c5];
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pwctr3 = [0d 00];
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pwctr4 = [8d 1a];
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pwctr5 = [8d ee];
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frmctr1 = [02 35 36];
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frmctr2 = [02 35 36];
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frmctr3 = [02 35 36 02 35 36];
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gamctrp1 = [0a 1c 0c 14 33 2b 24 28 27 25 2c 39 00 05 03 0d];
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gamctrn1 = [0a 1c 0c 14 33 2b 24 28 27 25 2d 3a 00 05 03 0d];
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};
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};
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};
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&uart0 {
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pinctrl-0 = <&uart0a_tx_p0_9 &uart0a_rx_p0_8>;
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pinctrl-names = "default";
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current-speed = <115200>;
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data-bits = <8>;
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parity = "none";
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status = "okay";
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};
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&clk_ipo {
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status = "okay";
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};
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/*
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* ERTCO is required for counter RTC
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*/
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&clk_ertco {
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status = "okay";
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&trng {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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pinctrl-0 = <&i2c0a_scl_p0_6 &i2c0a_sda_p0_7>;
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pinctrl-names = "default";
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};
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&dma0 {
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status = "okay";
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};
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&wdt0 {
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status = "okay";
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};
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&spi1 {
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status = "okay";
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pinctrl-0 = <&spi1a_mosi_p0_15 &spi1a_miso_p0_14 &spi1a_sck_p0_16 &spi1a_ss0_p0_17>;
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pinctrl-names = "default";
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};
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&spi0a_mosi_p0_3 {
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power-source=<MAX32_VSEL_VDDIOH>;
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};
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&spi0a_sck_p0_4 {
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power-source=<MAX32_VSEL_VDDIOH>;
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};
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&spi0 {
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status = "okay";
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pinctrl-0 = <&spi0a_mosi_p0_3 &spi0a_miso_p0_2 &spi0a_sck_p0_4>;
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pinctrl-names = "default";
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cs-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
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};
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&rtc_counter {
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status = "okay";
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};
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