Eric Ackermann 7ea1bb783f soc: cv32a6: Remove erroneous CPU_HAS_FPU configs ... In the default configuration, cv32a6 does not have an FPU and does not implement RISC-V's F and D extensions. Hence, the FPU flags should not be added. In the future, a second SoC for cv32a6 systems with FPU can be added. Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>		2025-04-18 17:46:30 +02:00
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cva6	soc: cv32a6: Remove erroneous CPU_HAS_FPU configs	2025-04-18 17:46:30 +02:00