Mark backup sram as supported and document it. Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
360 lines
13 KiB
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360 lines
13 KiB
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.. _nucleo_h563zi_board:
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ST Nucleo H563ZI
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################
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Overview
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********
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The Nucleo H563ZI board is designed as an affordable development platform for
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STMicroelectronics ARM |reg| Cortex |reg|-M33 core-based STM32H563ZIT6
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microcontroller with TrustZone |reg|.
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Here are some highlights of the Nucleo H563ZI board:
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- STM32H563ZI microcontroller featuring 2 Mbytes of Flash memory and 640Kbyte of
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SRAM in LQFP144 package
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- Board connectors:
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- USB Type-C |trade| Sink device FS
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- Ethernet RJ45 connector compliant with IEEE-802.3-2002 (depending on STM32 support)
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- ST Zio expansion connector including Arduino Uno V3 connectivity (CN7, CN8, CN9, CN10)
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- ST morpho extension connector (CN11, CN12)
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- Flexible board power supply:
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- 5V_USB_STLK from ST-Link USB connector
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- VIN (7 - 12V, 0.8A) supplied via pin header CN8 pin 15 or CN11 pin 24
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- 5V_EXT on the ST morpho connector CN11 Pin 6 (5V, 1.3)
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- CHGR from a USB charger via the ST-LINK USB connector
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- USB_USER from the USB user connector (5V, 3A)
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- 3V3_EXT supplied via a pin header CN8 pin 7 or CN11 pin 16 (3.3V, 1.3A)
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- On-board ST-LINK/V3EC debugger/programmer
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- mass storage
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- Virtual COM port
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- debug port
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- Three users LEDs
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- Two push-buttons: USER and RESET
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- 32.789 kHz crystal oscillator
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More information about the board can be found at the `NUCLEO_H563ZI website`_.
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.. image:: img/nucleo_h563zi.jpg
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:align: center
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:alt: NUCLEO H563ZI
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Hardware
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********
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The STM32H563xx devices are high-performance microcontrollers from the STM32H5
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Series based on the high-performance Arm |reg| Cortex |reg|-M33 32-bit RISC core.
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They operate at a frequency of up to 250 MHz.
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- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU.
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- Performance benchmark:
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- 375 DMPIS/MHz (Dhrystone 2.1)
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- Security
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- Arm |reg| TrustZone |reg| with ARMv8-M mainline security extension
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- Up to 8 configurable SAU regions
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- TrustZone |reg| aware and securable peripherals
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- Flexible lifecycle scheme with secure debug authentication
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- SFI (secure firmware installation)
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- Secure firmware upgrade support with TF-M
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- HASH hardware accelerator
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- True random number generator, NIST SP800-90B compliant
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- 96-bit unique ID
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- Active tampers
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- Clock management:
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- 25 MHz crystal oscillator (HSE)
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- 32 kHz crystal oscillator for RTC (LSE)
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- Internal 64 MHz (HSI) trimmable by software
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- Internal low-power 32 kHz RC (LSI)( |plusminus| 5%)
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- Internal 4 MHz oscillator (CSI), trimmable by software
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- Internal 48 MHz (HSI48) with recovery system
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- 3 PLLs for system clock, USB, audio, ADC
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- Power management
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- Embedded regulator (LDO) with three configurable range output to supply the digital circuitry
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- Embedded SMPS step-down converter
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- RTC with HW calendar, alarms and calibration
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- Up to 139 fast I/Os, most 5 V-tolerant, up to 10 I/Os with independent supply down to 1.08 V
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- Up to 16 timers and 2 watchdogs
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- 12x 16-bit
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- 2x 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
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- 6x 16-bit low-power 16-bit timers (available in Stop mode)
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- 2x watchdogs
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- 2x SysTick timer
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- Memories
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- Up to 2 MB Flash, 2 banks read-while-write
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- 1 Kbyte OTP (one-time programmable)
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- 640 KB of SRAM including 64 KB with hardware parity check and 320 Kbytes with flexible ECC
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- 4 Kbytes of backup SRAM available in the lowest power modes
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- Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
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- 1x OCTOSPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats
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- 2x SD/SDIO/MMC interfaces
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- Rich analog peripherals (independent supply)
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- 2x 12-bit ADC with up to 5 MSPS in 12-bit
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- 1x 12-bit D/A with 2 channels
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- 1x Digital temperature sensor
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- 34x communication interfaces
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- 1x USB Type-C / USB power-delivery controller
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- 1x USB 2.0 full-speed host and device
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- 4x I2C FM+ interfaces (SMBus/PMBus)
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- 1x I3C interface
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- 12x U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control)
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- 1x LP UART
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- 6x SPIs including 3 muxed with full-duplex I2S
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- 5x additional SPI from 5x USART when configured in Synchronous mode
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- 2x SAI
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- 2x FDCAN
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- 1x SDMMC interface
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- 2x 16 channel DMA controllers
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- 1x 8- to 14- bit camera interface
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- 1x HDMI-CEC
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- 1x Ethernel MAC interface with DMA controller
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- 1x 16-bit parallel slave synchronous-interface
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- CORDIC for trigonometric functions acceleration
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- FMAC (filter mathematical accelerator)
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- CRC calculation unit
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- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
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More information about STM32H563ZI can be found here:
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- `STM32H563ZI on www.st.com`_
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- `STM32H563 reference manual`_
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Supported Features
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==================
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The Zephyr nucleo_h563zi board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| ADC | on-chip | ADC Controller |
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+-----------+------------+-------------------------------------+
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| BKP SRAM | on-chip | Backup SRAM |
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+-----------+------------+-------------------------------------+
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| CAN/CANFD | on-chip | CAN |
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+-----------+------------+-------------------------------------+
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| CLOCK | on-chip | reset and clock control |
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+-----------+------------+-------------------------------------+
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| DAC | on-chip | DAC Controller |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| PWM | on-chip | PWM |
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+-----------+------------+-------------------------------------+
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| RNG | on-chip | True Random number generator |
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+-----------+------------+-------------------------------------+
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| RTC | on-chip | Real Time Clock |
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+-----------+------------+-------------------------------------+
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| SPI | on-chip | spi bus |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c bus |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| WATCHDOG | on-chip | independent watchdog |
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+-----------+------------+-------------------------------------+
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| USB | on-chip | USB full-speed host/device bus |
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+-----------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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The default configuration can be found in the defconfig and dts files:
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- Secure target:
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- :zephyr_file:`boards/st/nucleo_h563zi/nucleo_h563zi_defconfig`
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- :zephyr_file:`boards/st/nucleo_h563zi/nucleo_h563zi.dts`
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Zephyr board options
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====================
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The STM32H563 is an SoC with Cortex-M33 architecture. Zephyr provides support
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for building for Secure firmware.
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The BOARD options are summarized below:
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+----------------------+-----------------------------------------------+
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| BOARD | Description |
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+======================+===============================================+
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| nucleo_h563zi | For building Secure firmware |
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+----------------------+-----------------------------------------------+
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Connections and IOs
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===================
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Nucleo H563ZI Board has 9 GPIO controllers. These controllers are responsible for pin muxing,
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input/output, pull-up, etc.
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For more details please refer to `STM32H5 Nucleo-144 board User Manual`_.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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- ADC1 channel 3 input: PA6
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- ADC1 channel 15 input: PA3
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- DAC1 channel 2 output: PA5
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- CAN/CANFD TX/RX: PD1/PD0
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- LD1 (green): PB0
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- LD2 (yellow): PF4
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- LD3 (red): PG4
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- LPUART1 TX/RX : PB6/PB7 (Arduino LPUART1)
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- SPI1 SCK/MISO/MOSI/CS: PA5/PG9/PB5/PD14
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- UART3 TX/RX : PD8/PD9 (VCP)
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- USER_PB : PC13
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System Clock
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------------
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Nucleo H563ZI System Clock could be driven by internal or external oscillator,
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as well as main PLL clock. By default System clock is driven by PLL clock at
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240MHz, driven by 8MHz external clock provided from the STLINK-V3EC.
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Serial Port
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-----------
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Nucleo H563ZI board has up to 12 U(S)ARTs. The Zephyr console output is assigned
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to USART3. Default settings are 115200 8N1.
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Backup SRAM
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-----------
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In order to test backup SRAM, you may want to disconnect VBAT from VDD_MCU.
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You can do it by removing ``SB55`` jumper on the back side of the board.
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VBAT can be provided via the left ST Morpho connector's pin 33.
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Programming and Debugging
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*************************
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Applications for the ``nucleo_h563zi`` board can be built and
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flashed in the usual way (see :ref:`build_an_application` and
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:ref:`application_run` for more details).
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OpenOCD Support
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===============
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For now, openocd support for stm32h5 is not available on upstream OpenOCD.
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You can check `OpenOCD official Github mirror`_.
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In order to use it though, you should clone from the cutomized
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`STMicroelectronics OpenOCD Github`_ and compile it following usual README guidelines.
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Once it is done, you can set the OPENOCD and OPENOCD_DEFAULT_PATH variables in
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:zephyr_file:`boards/st/nucleo_h563zi/board.cmake` to point the build
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to the paths of the OpenOCD binary and its scripts, before
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including the common openocd.board.cmake file:
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.. code-block:: none
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set(OPENOCD "<path_to_openocd_repo>/src/openocd" CACHE FILEPATH "" FORCE)
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set(OPENOCD_DEFAULT_PATH <path_to_opneocd_repo>/tcl)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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Flashing
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========
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Nucleo H563ZI board includes an ST-LINK/V3EC embedded debug tool interface.
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This probe allows to flash the board using various tools.
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Board is configured to be flashed using west STM32CubeProgrammer runner.
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Installation of `STM32CubeProgrammer`_ is then required to flash the board.
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Alternatively, pyocd or jlink via an external probe can also be used to flash
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and debug the board if west is told to use it as runner, which can be done by
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passing either or ``-r pyocd``, or ``-r jlink``.
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For pyocd additional target information needs to be installed.
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This can be done by executing the following commands.
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.. code-block:: console
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$ pyocd pack --update
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$ pyocd pack --install stm32h5
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Alternatively, the openocd interface will be supported by a next openocd version.
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When available, OpenOCD could be used in the same way as other tools.
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Flashing an application to Nucleo H563ZI
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------------------------------------------
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Connect the Nucleo H563ZI to your host computer using the USB port.
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Then build and flash an application. Here is an example for the
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:ref:`hello_world` application.
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Run a serial host program to connect with your Nucleo board:
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.. code-block:: console
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$ minicom -D /dev/ttyACM0
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Then build and flash the application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: nucleo_h563zi
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:goals: build flash
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You should see the following message on the console:
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.. code-block:: console
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Hello World! nucleo_h563zi
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Debugging
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=========
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You can debug an application in the usual way. Here is an example for the
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:zephyr:code-sample:`blinky` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: nucleo_h563zi
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:goals: debug
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.. _NUCLEO_H563ZI website:
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https://www.st.com/en/evaluation-tools/nucleo-h563zi
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.. _STM32H5 Nucleo-144 board User Manual:
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https://www.st.com/resource/en/user_manual/um3115-stm32h5-nucleo144-board-mb1404-stmicroelectronics.pdf
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.. _STM32H563ZI on www.st.com:
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https://www.st.com/en/microcontrollers/stm32h563zi.html
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.. _STM32H563 reference manual:
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https://www.st.com/resource/en/reference_manual/rm0481-stm32h563h573-and-stm32h562-armbased-32bit-mcus-stmicroelectronics.pdf
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.. _STM32CubeProgrammer:
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https://www.st.com/en/development-tools/stm32cubeprog.html
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.. _OpenOCD official Github mirror:
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https://github.com/openocd-org/openocd/
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.. _STMicroelectronics OpenOCD Github:
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https://github.com/STMicroelectronics/OpenOCD/tree/openocd-cubeide-r6
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