zephyr/soc/xtensa
Guennadi Liakhovetski ca12fd13c6 xtensa: intel_adsp: fix a cache handling error
.bss and .data are uncached in Zephyr builds for intel_adsp. No need
to try to manipulate cache of objects in those sections.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2024-01-15 09:59:07 +01:00
..
dc233c xtensa: dc233c: force invalidating TLBs during page table swap 2023-12-27 15:59:05 +00:00
espressif_esp32 soc: esp32: refactor esp32_net 2024-01-13 00:22:24 +00:00
intel_adsp xtensa: intel_adsp: fix a cache handling error 2024-01-15 09:59:07 +01:00
nxp_adsp xtensa: rename z_xtensa_irq to simple xtensa_irq 2023-12-13 09:41:24 +01:00
sample_controller cmake: cleanup and simplify the standard include logic in Zephyr 2023-11-06 18:57:30 -05:00
CMakeLists.txt soc/xtensa/intel_adsp: Upstream updates 2020-10-21 06:38:53 -04:00