c8938737c0
Add devices node that support I2C for RA6 boards Signed-off-by: Tri Nguyen <tri.nguyen.wj@bp.renesas.com>
356 lines
7.3 KiB
Text
356 lines
7.3 KiB
Text
/*
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* Copyright (c) 2024 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/renesas/ra/ra6/ra6-cm33-common.dtsi>
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#include <zephyr/dt-bindings/clock/ra_clock.h>
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/ {
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soc {
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sram0: memory@20000000 {
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compatible = "mmio-sram";
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reg = <0x20000000 DT_SIZE_K(512)>;
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};
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ioport6: gpio@400800c0 {
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compatible = "renesas,ra-gpio-ioport";
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reg = <0x400800c0 0x20>;
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port = <6>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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status = "disabled";
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};
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ioport7: gpio@400800e0 {
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compatible = "renesas,ra-gpio-ioport";
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reg = <0x400800e0 0x20>;
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port = <7>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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status = "disabled";
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};
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ioport8: gpio@40080100 {
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compatible = "renesas,ra-gpio-ioport";
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reg = <0x40080100 0x20>;
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port = <8>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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status = "disabled";
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};
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ioport9: gpio@40080120 {
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compatible = "renesas,ra-gpio-ioport";
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reg = <0x40080120 0x20>;
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port = <9>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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status = "disabled";
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};
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ioporta: gpio@40080140 {
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compatible = "renesas,ra-gpio-ioport";
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reg = <0x40080140 0x20>;
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port = <10>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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status = "disabled";
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};
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ioportb: gpio@40080160 {
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compatible = "renesas,ra-gpio-ioport";
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reg = <0x40080160 0x20>;
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port = <11>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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status = "disabled";
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};
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sci1: sci1@40118100 {
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compatible = "renesas,ra-sci";
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interrupts = <4 1>, <5 1>, <6 1>, <7 1>;
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interrupt-names = "rxi", "txi", "tei", "eri";
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reg = <0x40118100 0x100>;
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clocks = <&pclka MSTPB 30>;
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status = "disabled";
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uart {
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compatible = "renesas,ra-sci-uart";
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channel = <1>;
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status = "disabled";
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};
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};
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sci2: sci2@40118200 {
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compatible = "renesas,ra-sci";
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interrupts = <8 1>, <9 1>, <10 1>, <11 1>;
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interrupt-names = "rxi", "txi", "tei", "eri";
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reg = <0x40118200 0x100>;
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clocks = <&pclka MSTPB 29>;
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status = "disabled";
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uart {
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compatible = "renesas,ra-sci-uart";
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channel = <2>;
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status = "disabled";
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};
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};
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sci3: sci3@40118300 {
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compatible = "renesas,ra-sci";
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interrupts = <12 1>, <13 1>, <14 1>, <15 1>;
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interrupt-names = "rxi", "txi", "tei", "eri";
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reg = <0x40118300 0x100>;
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clocks = <&pclka MSTPB 28>;
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status = "disabled";
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uart {
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compatible = "renesas,ra-sci-uart";
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channel = <3>;
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status = "disabled";
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};
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};
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sci4: sci4@40118400 {
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compatible = "renesas,ra-sci";
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interrupts = <16 1>, <17 1>, <18 1>, <19 1>;
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interrupt-names = "rxi", "txi", "tei", "eri";
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reg = <0x40118400 0x100>;
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clocks = <&pclka MSTPB 27>;
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status = "disabled";
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uart {
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compatible = "renesas,ra-sci-uart";
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channel = <4>;
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status = "disabled";
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};
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};
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sci5: sci5@40118500 {
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compatible = "renesas,ra-sci";
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interrupts = <20 1>, <21 1>, <22 1>, <23 1>;
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interrupt-names = "rxi", "txi", "tei", "eri";
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reg = <0x40118500 0x100>;
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clocks = <&pclka MSTPB 26>;
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status = "disabled";
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uart {
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compatible = "renesas,ra-sci-uart";
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channel = <5>;
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status = "disabled";
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};
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};
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sci6: sci6@40118600 {
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compatible = "renesas,ra-sci";
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interrupts = <24 1>, <25 1>, <26 1>, <27 1>;
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interrupt-names = "rxi", "txi", "tei", "eri";
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reg = <0x40118600 0x100>;
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clocks = <&pclka MSTPB 25>;
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status = "disabled";
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uart {
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compatible = "renesas,ra-sci-uart";
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channel = <6>;
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status = "disabled";
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};
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};
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sci7: sci7@40118700 {
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compatible = "renesas,ra-sci";
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interrupts = <28 1>, <29 1>, <30 1>, <31 1>;
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interrupt-names = "rxi", "txi", "tei", "eri";
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reg = <0x40118700 0x100>;
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clocks = <&pclka MSTPB 24>;
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status = "disabled";
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uart {
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compatible = "renesas,ra-sci-uart";
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channel = <7>;
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status = "disabled";
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};
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};
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sci8: sci8@40118800 {
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compatible = "renesas,ra-sci";
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interrupts = <32 1>, <33 1>, <34 1>, <35 1>;
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interrupt-names = "rxi", "txi", "tei", "eri";
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reg = <0x40118800 0x100>;
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clocks = <&pclka MSTPB 23>;
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status = "disabled";
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uart {
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compatible = "renesas,ra-sci-uart";
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channel = <8>;
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status = "disabled";
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};
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};
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iic2: iic2@4009f200 {
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compatible = "renesas,ra-iic";
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channel = <2>;
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reg = <0x4009f200 0x100>;
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status = "disabled";
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};
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};
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clocks: clocks {
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#address-cells = <1>;
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#size-cells = <1>;
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xtal: clock-main-osc {
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compatible = "renesas,ra-cgc-external-clock";
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clock-frequency = <DT_FREQ_M(24)>;
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#clock-cells = <0>;
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status = "disabled";
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};
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hoco: clock-hoco {
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compatible = "fixed-clock";
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clock-frequency = <DT_FREQ_M(20)>;
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#clock-cells = <0>;
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};
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moco: clock-moco {
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compatible = "fixed-clock";
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clock-frequency = <DT_FREQ_M(8)>;
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#clock-cells = <0>;
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};
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loco: clock-loco {
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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#clock-cells = <0>;
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};
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subclk: clock-subclk {
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compatible = "renesas,ra-cgc-subclk";
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clock-frequency = <32768>;
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#clock-cells = <0>;
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status = "disabled";
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};
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pll: pll {
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compatible = "renesas,ra-cgc-pll";
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#clock-cells = <0>;
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/* PLL */
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clocks = <&xtal>;
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div = <3>;
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mul = <25 0>;
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status = "disabled";
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};
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pll2: pll2 {
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compatible = "renesas,ra-cgc-pll";
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#clock-cells = <0>;
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/* PLL2 */
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div = <2>;
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mul = <20 0>;
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status = "disabled";
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};
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pclkblock: pclkblock@40084000 {
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compatible = "renesas,ra-cgc-pclk-block";
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reg = <0x40084000 4>, <0x40084004 4>, <0x40084008 4>,
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<0x4008400c 4>, <0x40084010 4>;
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reg-names = "MSTPA", "MSTPB","MSTPC",
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"MSTPD", "MSTPE";
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#clock-cells = <0>;
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clocks = <&pll>;
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status = "okay";
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iclk: iclk {
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compatible = "renesas,ra-cgc-pclk";
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div = <1>;
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#clock-cells = <2>;
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status = "okay";
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};
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pclka: pclka {
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compatible = "renesas,ra-cgc-pclk";
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div = <2>;
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#clock-cells = <2>;
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status = "okay";
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};
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pclkb: pclkb {
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compatible = "renesas,ra-cgc-pclk";
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div = <4>;
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#clock-cells = <2>;
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status = "okay";
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};
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pclkc: pclkc {
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compatible = "renesas,ra-cgc-pclk";
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div = <4>;
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#clock-cells = <2>;
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status = "okay";
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};
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pclkd: pclkd {
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compatible = "renesas,ra-cgc-pclk";
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div = <2>;
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#clock-cells = <2>;
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status = "okay";
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};
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bclk: bclk {
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compatible = "renesas,ra-cgc-pclk";
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div = <2>;
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bclkout: bclkout {
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compatible = "renesas,ra-cgc-busclk";
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clk-out-div = <2>;
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sdclk = <0>;
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#clock-cells = <0>;
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};
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#clock-cells = <2>;
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status = "okay";
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};
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fclk: fclk {
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compatible = "renesas,ra-cgc-pclk";
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div = <4>;
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#clock-cells = <2>;
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status = "okay";
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};
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clkout: clkout {
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compatible = "renesas,ra-cgc-pclk";
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#clock-cells = <2>;
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status = "disabled";
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};
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uclk: uclk {
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compatible = "renesas,ra-cgc-pclk";
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#clock-cells = <2>;
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status = "disabled";
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};
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u60clk: u60clk {
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compatible = "renesas,ra-cgc-pclk";
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#clock-cells = <2>;
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status = "disabled";
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};
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octaspiclk: octaspiclk {
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compatible = "renesas,ra-cgc-pclk";
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#clock-cells = <2>;
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status = "disabled";
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};
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canfdclk: canfdclk {
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compatible = "renesas,ra-cgc-pclk";
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#clock-cells = <2>;
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status = "disabled";
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};
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cecclk: cecclk {
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compatible = "renesas,ra-cgc-pclk";
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#clock-cells = <2>;
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status = "disabled";
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};
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};
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};
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};
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