c4de0d3b5b
Kconfig based device declaration is kept as is. Clean up the fixup files. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
72 lines
3.8 KiB
C
72 lines
3.8 KiB
C
/* SPDX-License-Identifier: Apache-2.0 */
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/* SoC level DTS fixup file */
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define DT_NUM_MPU_REGIONS DT_ARM_ARMV7M_MPU_E000ED90_ARM_NUM_MPU_REGIONS
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#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
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#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
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#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
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#define DT_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
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#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
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#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
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#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
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#define DT_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V2_40005400_CLOCK_BITS
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#define DT_I2C_1_CLOCK_BUS DT_ST_STM32_I2C_V2_40005400_CLOCK_BUS
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#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
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#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
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#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
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#define DT_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
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#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT
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#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR
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#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
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#define DT_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V2_40005800_CLOCK_BITS
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#define DT_I2C_2_CLOCK_BUS DT_ST_STM32_I2C_V2_40005800_CLOCK_BUS
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#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
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#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
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#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
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#define DT_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
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#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT
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#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR
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#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
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#define DT_I2C_3_CLOCK_BITS DT_ST_STM32_I2C_V2_40005C00_CLOCK_BITS
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#define DT_I2C_3_CLOCK_BUS DT_ST_STM32_I2C_V2_40005C00_CLOCK_BUS
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#define DT_I2C_4_BASE_ADDRESS DT_ST_STM32_I2C_V2_40006000_BASE_ADDRESS
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#define DT_I2C_4_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40006000_IRQ_EVENT_PRIORITY
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#define DT_I2C_4_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40006000_IRQ_ERROR_PRIORITY
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#define DT_I2C_4_NAME DT_ST_STM32_I2C_V2_40006000_LABEL
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#define DT_I2C_4_EVENT_IRQ DT_ST_STM32_I2C_V2_40006000_IRQ_EVENT
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#define DT_I2C_4_ERROR_IRQ DT_ST_STM32_I2C_V2_40006000_IRQ_ERROR
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#define DT_I2C_4_BITRATE DT_ST_STM32_I2C_V2_40006000_CLOCK_FREQUENCY
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#define DT_I2C_4_CLOCK_BITS DT_ST_STM32_I2C_V2_40006000_CLOCK_BITS
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#define DT_I2C_4_CLOCK_BUS DT_ST_STM32_I2C_V2_40006000_CLOCK_BUS
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#define DT_RTC_0_NAME DT_LABEL(DT_INST(0, st_stm32_rtc))
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#define DT_FLASH_DEV_NAME DT_LABEL(DT_INST(0, st_stm32f7_flash_controller))
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#define DT_CAN_1_BASE_ADDRESS DT_ST_STM32_CAN_40006400_BASE_ADDRESS
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#define DT_CAN_1_BUS_SPEED DT_ST_STM32_CAN_40006400_BUS_SPEED
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#define DT_CAN_1_NAME DT_ST_STM32_CAN_40006400_LABEL
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#define DT_CAN_1_IRQ_TX DT_ST_STM32_CAN_40006400_IRQ_TX
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#define DT_CAN_1_IRQ_RX0 DT_ST_STM32_CAN_40006400_IRQ_RX0
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#define DT_CAN_1_IRQ_RX1 DT_ST_STM32_CAN_40006400_IRQ_RX1
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#define DT_CAN_1_IRQ_SCE DT_ST_STM32_CAN_40006400_IRQ_SCE
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#define DT_CAN_1_IRQ_PRIORITY DT_ST_STM32_CAN_40006400_IRQ_0_PRIORITY
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#define DT_CAN_1_SJW DT_ST_STM32_CAN_40006400_SJW
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#define DT_CAN_1_PROP_SEG DT_ST_STM32_CAN_40006400_PROP_SEG
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#define DT_CAN_1_PHASE_SEG1 DT_ST_STM32_CAN_40006400_PHASE_SEG1
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#define DT_CAN_1_PHASE_SEG2 DT_ST_STM32_CAN_40006400_PHASE_SEG2
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#define DT_CAN_1_CLOCK_BUS DT_ST_STM32_CAN_40006400_CLOCK_BUS
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#define DT_CAN_1_CLOCK_BITS DT_ST_STM32_CAN_40006400_CLOCK_BITS
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#define DT_WDT_0_NAME DT_LABEL(DT_INST(0, st_stm32_watchdog))
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#define DT_ADC_1_NAME DT_ST_STM32_ADC_40012000_LABEL
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/* End of SoC Level DTS fixup file */
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