c29d41cab7
The new name better reflects that this file contains all private nanokernel APIs that are used by various kernel subsystems. Change-Id: I4c258d582e93753eec9e575fdb5f9f2109417a0f Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
391 lines
12 KiB
ArmAsm
391 lines
12 KiB
ArmAsm
/* swap.S - nanokernel swapper code for IA-32 */
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/*
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* Copyright (c) 2010-2014 Wind River Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Wind River Systems nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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DESCRIPTION
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This module implements the _Swap() routine for the IA-32 architecture.
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Note that the file include/nanokernel/x86/swapstk.h defines
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a representation of the save stack frame generated by _Swap() in order
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to generate offsets (in the form of absolute symbols) for consumption by
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host tools. Please update swapstk.h if changing the structure of the
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save frame on the stack.
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*/
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#define _ASMLANGUAGE
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#include <nano_private.h>
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#include <arch/x86/asm.h>
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#include <offsets.h> /* nanokernel structure offset definitions */
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/* exports (internal APIs) */
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GTEXT(_Swap)
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/* externs */
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/*******************************************************************************
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*
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* _Swap - initiate a cooperative context switch
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*
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* The _Swap() routine is invoked by various nanokernel services to effect
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* a cooperative context context switch. Prior to invoking _Swap(), the
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* caller disables interrupts (via irq_lock) and the return 'key'
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* is passed as a parameter to _Swap(). The 'key' actually represents
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* the EFLAGS register prior to disabling interrupts via a 'cli' instruction.
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*
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* Given that _Swap() is called to effect a cooperative context context switch,
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* only the non-volatile integer registers need to be saved in the tCCS of the
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* outgoing context. The restoration of the integer registers of the incoming
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* context depends on whether that context was preemptively context switched
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* out. The INT_ACTIVE and EXC_ACTIVE bits in the tCCS->flags field will signify
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* that the context was preemptively context switched out, and thus both the
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* volatile and non-volatile integer registers need to be restored.
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*
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* The non-volatile registers need to be scrubbed to ensure they contain no
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* sensitive information that could compromise system security. This is to
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* make sure that information will not be leaked from one application to
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* another via these volatile registers.
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*
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* Here, the integer registers (EAX, ECX, EDX) have been scrubbed. Any changes
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* to this routine that alter the values of these registers MUST be reviewed
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* for potential security impacts.
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*
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* Floating point registers are handled using a lazy save/restore
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* mechanism since it's expected relatively few contexts will be created
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* with the USE_FP or USE_SSE option bits. The nanokernel data structure
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* maintains a 'current_fp' field to keep track of the context that "owns"
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* the floating point registers. Floating point registers consist of
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* ST0->ST7 (x87 FPU and MMX registers) and XMM0 -> XMM7.
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*
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* All floating point registers are considered 'volatile' thus they will
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* only be saved/restored when a preemptive context context switch occurs.
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*
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* Floating point registers are currently NOT scrubbed, and are subject to
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* potential security leaks.
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*
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* The scheduling algorithm is simple: schedule the head of the runnable
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* FIBER context list, which is represented by _nanokernel.fiber. If there are
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* no runnable FIBER contexts, then schedule the TASK context represented
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* by _nanokernel.task. The _nanokernel.task field will never be NULL.
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*
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* RETURNS: may contain a return value setup by a call to fiberRtnValueSet()
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*
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* C function prototype:
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*
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* unsigned int _Swap (unsigned int eflags);
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*
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*/
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SECTION_FUNC(TEXT, _Swap)
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movl $_nanokernel, %eax
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/*
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* Push all non-volatile registers onto the stack; do not copy
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* any of these registers into the tCCS. Only the 'esp' register
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* after all the pushes have been performed) will be stored in the
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* tCCS.
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*/
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pushl %edi
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pushl %esi
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pushl %ebx
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pushl %ebp
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/*
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* Leave slot for eax register when _Swap() needs to return a value;
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* pre-populate slot with ebx's value in case _Swap() does not return
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* a value.
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*/
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pushl %ebx
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/* save esp into tCCS structure */
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movl __tNANO_current_OFFSET (%eax), %ecx
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movl %esp, __tCCS_coopReg_OFFSET + __tCoopReg_esp_OFFSET (%ecx)
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/*
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* Determine what FIBER or TASK context needs to be swapped in.
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* Note that the %eax still contains &_nanokernel.
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*/
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movl __tNANO_fiber_OFFSET (%eax), %ecx
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testl %ecx, %ecx
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jz swapTask /* Jump if no ready fibers */
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/* remove the head 'tCCS *' from the runnable context list */
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movl __tCCS_link_OFFSET (%ecx), %ebx
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movl %ebx, __tNANO_fiber_OFFSET (%eax)
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jmp restoreContext
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/*
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* There are no FIBER context in the run queue, thus swap in the
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* TASK context specified via _nanokernel.task. The 'task' field
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* will _never_ be NULL.
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*/
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BRANCH_LABEL(swapTask)
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movl __tNANO_task_OFFSET (%eax), %ecx
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/* fall through to 'restoreContext' */
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/*
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* At this point, the %ecx register contains the 'tCCS *' of
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* the TASK or FIBER to be swapped in, and %eax still
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* contains &_nanokernel.
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*/
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BRANCH_LABEL(restoreContext)
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#ifdef CONFIG_FP_SHARING
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#ifdef CONFIG_AUTOMATIC_FP_ENABLING
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/*
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* Clear the CR0[TS] bit (in the event the current context
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* doesn't have floating point enabled) to prevent the "device not
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* available" exception when executing the subsequent fxsave/fnsave
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* and/or fxrstor/frstor instructions.
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*
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* Indeed, it's possible that none of the aforementioned instructions
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* need to be executed, for example, the incoming context doesn't
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* utilize floating point operations. However, the code responsible
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* for setting the CR0[TS] bit appropriately for the incoming context
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* (just after the 'restoreContext_NoFloatSwap' label) will leverage
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* the fact that the following 'clts' was performed already.
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*/
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clts
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#endif /* CONFIG_AUTOMATIC_FP_ENABLING */
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/*
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* Determine whether the incoming context utilizes non-integer
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* capabilities _and_ whether the context was context switched
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* out preemptively.
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*/
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testl $USE_FP, __tCCS_flags_OFFSET (%ecx)
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je restoreContext_NoFloatSwap
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/*
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* The incoming context uses non-integer capabilities (x87 FPU and/or
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* XMM regs): Was it the last context to use non-integer capabilities?
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* If so, there there is no need to restore the non-integer context.
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*/
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movl __tNANO_current_fp_OFFSET (%eax), %ebx
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cmpl %ebx, %ecx
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je restoreContext_NoFloatSwap
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/*
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* The incoming context uses non-integer capabilities (x87 FPU and/or
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* XMM regs) and it was _not_ the last context to use the non-integer
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* capabilities: Check whether the current FP context actually needs
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* to be saved before swapping in the context of the incoming context
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*/
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testl %ebx, %ebx
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jz restoreContext_NoFloatSave
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/*
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* The incoming context uses non-integer capabilities (x87 FPU and/or
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* XMM regs) and it was _not_ the last context to use the non-integer
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* capabilities _and_ the current FP context needs to be saved.
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*
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* Given that the ST[0] -> ST[7] and XMM0 -> XMM7 registers are all
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* 'volatile', only save the registers if the "current FP context"
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* was preemptively context switched.
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*/
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testl $INT_OR_EXC_MASK, __tCCS_flags_OFFSET (%ebx)
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je restoreContext_NoFloatSave
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#ifdef CONFIG_SSE
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testl $USE_SSE, __tCCS_flags_OFFSET (%ebx)
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je x87FloatSave
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/*
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* 'fxsave' does NOT perform an implicit 'fninit', therefore issue an
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* 'fninit' to ensure a "clean" FPU state for the incoming context
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* (for the case when the fxrstor is not executed).
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*/
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fxsave __tCCS_preempFloatReg_OFFSET (%ebx)
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fninit
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jmp floatSaveDone
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BRANCH_LABEL(x87FloatSave)
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#endif /* CONFIG_SSE */
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/* 'fnsave' performs an implicit 'fninit' after saving state! */
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fnsave __tCCS_preempFloatReg_OFFSET (%ebx)
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/* fall through to 'floatSaveDone' */
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BRANCH_LABEL(floatSaveDone)
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BRANCH_LABEL(restoreContext_NoFloatSave)
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/*********************************************************
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* Restore floating point context of the incoming context.
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*********************************************************/
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/*
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* Again, given that the ST[0] -> ST[7] and XMM0 -> XMM7 registers are
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* all 'volatile', only restore the registers if the incoming
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* context was previously preemptively context switched out.
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*/
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testl $INT_OR_EXC_MASK, __tCCS_flags_OFFSET (%ecx)
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je restoreContext_NoFloatRestore
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#ifdef CONFIG_SSE
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testl $USE_SSE, __tCCS_flags_OFFSET (%ecx)
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je x87FloatRestore
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fxrstor __tCCS_preempFloatReg_OFFSET (%ecx)
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jmp floatRestoreDone
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BRANCH_LABEL(x87FloatRestore)
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#endif /* CONFIG_SSE */
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frstor __tCCS_preempFloatReg_OFFSET (%ecx)
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/* fall through to 'floatRestoreDone' */
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BRANCH_LABEL(floatRestoreDone)
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BRANCH_LABEL(restoreContext_NoFloatRestore)
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/* record that the incoming context "owns" the non-integer registers */
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movl %ecx, __tNANO_current_fp_OFFSET (%eax)
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/*
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* Branch point when none of the non-integer registers need to be
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* swapped either due to a) the incoming context does not
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* USE_FP | USE_SSE, or b) the incoming context is the same as
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* the last context that utilized the non-integer registers.
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*/
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BRANCH_LABEL(restoreContext_NoFloatSwap)
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#ifdef CONFIG_AUTOMATIC_FP_ENABLING
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/*
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* Leave CR0[TS] clear if incoming context utilizes "floating point"
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* instructions
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*/
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testl $USE_FP, __tCCS_flags_OFFSET (%ecx)
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jne CROHandlingDone
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/*
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* The incoming context does NOT currently utilize "floating point"
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* instructions, so set CR0[TS] to ensure the "device not available"
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* exception occurs on the first attempt to access a x87 FPU, MMX,
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* or XMM register.
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*/
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movl %cr0, %edx
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orl $0x8, %edx
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movl %edx, %cr0
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BRANCH_LABEL(CROHandlingDone)
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#endif /* CONFIG_AUTOMATIC_FP_ENABLING */
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#endif /* CONFIG_FP_SHARING */
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/* update _nanokernel.current to reflect incoming context */
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movl %ecx, __tNANO_current_OFFSET (%eax)
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/* recover task/fiber stack pointer from tCCS */
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movl __tCCS_coopReg_OFFSET + __tCoopReg_esp_OFFSET (%ecx), %esp
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/* load return value from a possible fiberRtnValueSet() */
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popl %eax
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/* pop the non-volatile registers from the stack */
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popl %ebp
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popl %ebx
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popl %esi
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popl %edi
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/*
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* For a non-preemptive context switch, it is checked that the volatile
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* integer registers have the following values:
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*
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* 1. ECX - points to the task's own CCS structure.
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* 2. EDX - contains the flags field of the task's own CCS structure.
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* 3. EAX - may contain one of the two values:
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* (a) the return value for _Swap() that was set up by a
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* call to fiberRtnValueSet()
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* (b) same value as EBX, which is non-volatile
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*/
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/* Utilize the 'eflags' parameter to _Swap() */
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pushl 4(%esp)
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#ifdef CONFIG_INT_LATENCY_BENCHMARK
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testl $0x200, (%esp)
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jz skipIntLatencyStop
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/* save %eax since it used as the return value for _Swap */
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pushl %eax
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/* interrupts are being reenabled, stop accumulating time */
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call _int_latency_stop
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/* restore _Swap's %eax */
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popl %eax
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BRANCH_LABEL(skipIntLatencyStop)
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#endif
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popfl
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ret
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