c158e3ee74
Currently supported nRF SoCs featuring the second GPIO port (P1) do not have all 32 pins implemented in that port. Add the "ngpios" property in gpio1 nodes for these SoCs, so that they don't take the default value of 32 to indicate the number of available pins but use instead: - 10 for nRF52833 - 16 for nRF52840 - 16 for nRF5340 (both application and network core) Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
264 lines
5.1 KiB
Text
264 lines
5.1 KiB
Text
/*
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* Copyright (c) 2019 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv8-m.dtsi>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-m33";
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv8m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <16>;
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};
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};
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};
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aliases {
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flash-controller = &flash_controller;
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rtc-0 = &rtc0;
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rtc-1 = &rtc1;
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uart-0 = &uart0;
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gpio-0 = &gpio0;
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gpio-1 = &gpio1;
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gpiote-0 = &gpiote;
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i2c-0 = &i2c0;
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ipc-0 = &ipc;
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spi-0 = &spi0;
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wdt-0 = &wdt;
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timer-0 = &timer0;
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timer-1 = &timer1;
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timer-2 = &timer2;
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};
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flash_controller: flash-controller@41080000 {
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compatible = "nordic,nrf53-flash-controller";
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reg = <0x41080000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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label="NRF_FLASH_DRV_NAME";
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flash1: flash@1000000 {
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compatible = "soc-nv-flash";
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label = "NRF_FLASH";
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erase-block-size = <2048>;
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write-block-size = <4>;
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};
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};
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soc {
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sram1: memory@21000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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};
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clock: clock@41005000 {
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compatible = "nordic,nrf-clock";
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reg = <0x41005000 0x1000>;
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interrupts = <5 1>;
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status = "okay";
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label = "CLOCK";
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};
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dppic: dppic@4100f000 {
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compatible = "nordic,nrf-dppic";
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reg = <0x4100f000 0x1000>;
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status = "okay";
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label = "DPPIC";
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};
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egu0: egu@41014000 {
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compatible = "nordic,nrf-egu";
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reg = <0x41014000 0x1000>;
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interrupts = <20 1>;
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status = "okay";
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label = "EGU_0";
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};
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ficr: ficr@1ff0000 {
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compatible = "nordic,nrf-ficr";
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reg = <0x01ff0000 0x1000>;
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status = "okay";
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};
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gpio0: gpio@418c0500 {
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compatible = "nordic,nrf-gpio";
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gpio-controller;
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reg = <0x418c0500 0x300>;
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#gpio-cells = <2>;
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label = "GPIO_0";
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status = "disabled";
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};
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gpio1: gpio@418c0800 {
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compatible = "nordic,nrf-gpio";
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gpio-controller;
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reg = <0x418c0800 0x300>;
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#gpio-cells = <2>;
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ngpios = <16>;
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label = "GPIO_1";
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status = "disabled";
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};
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gpiote: gpiote@4100a000 {
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compatible = "nordic,nrf-gpiote";
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reg = <0x4100a000 0x1000>;
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interrupts = <10 5>;
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status = "disabled";
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label = "GPIOTE_0";
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};
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i2c0: i2c@41013000 {
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/*
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* This i2c node can be TWIM or TWIS,
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* for the user to pick:
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* compatible = "nordic,nrf-twim" or
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* "nordic,nrf-twis".
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*/
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x41013000 0x1000>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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interrupts = <19 1>;
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status = "disabled";
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label = "I2C_0";
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};
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ipc: ipc@41012000 {
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compatible = "nordic,nrf-ipc";
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reg = <0x41012000 0x1000>;
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interrupts = <18 1>;
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status = "okay";
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label = "IPC";
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};
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power: power@41005000 {
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compatible = "nordic,nrf-power";
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reg = <0x41005000 0x1000>;
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interrupts = <5 1>;
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status = "okay";
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};
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rng: random@41009000 {
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compatible = "nordic,nrf-rng";
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reg = <0x41009000 0x1000>;
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interrupts = <9 0>;
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status = "okay";
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label = "RNG";
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};
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rtc0: rtc@41011000 {
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compatible = "nordic,nrf-rtc";
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reg = <0x41011000 0x1000>;
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interrupts = <17 1>;
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status = "okay";
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label = "RTC_0";
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};
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rtc1: rtc@41016000 {
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compatible = "nordic,nrf-rtc";
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reg = <0x41016000 0x1000>;
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interrupts = <22 1>;
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status = "okay";
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label = "RTC_1";
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};
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spi0: spi@41013000 {
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/*
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* This spi node can be SPIM or SPIS,
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* for the user to pick:
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* compatible = "nordic,nrf-spim" or
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* "nordic,nrf-spis".
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*/
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x41013000 0x1000>;
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interrupts = <19 1>;
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status = "disabled";
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label = "SPI_0";
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};
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temp: temp@41010000 {
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compatible = "nordic,nrf-temp";
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reg = <0x41010000 0x1000>;
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interrupts = <16 1>;
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status = "okay";
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label = "TEMP_0";
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};
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timer0: timer@4100c000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0x4100c000 0x1000>;
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interrupts = <12 1>;
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prescaler = <0>;
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label = "TIMER0";
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};
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timer1: timer@41018000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0x41018000 0x1000>;
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interrupts = <24 1>;
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prescaler = <0>;
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label = "TIMER1";
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};
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timer2: timer@41019000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0x41019000 0x1000>;
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interrupts = <25 1>;
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prescaler = <0>;
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label = "TIMER2";
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};
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uart0: uart@41013000 {
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compatible = "nordic,nrf-uarte";
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reg = <0x41013000 0x1000>;
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interrupts = <19 1>;
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status = "disabled";
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label = "UART_0";
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};
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uicr: uicr@1ff8000 {
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compatible = "nordic,nrf-uicr";
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reg = <0x01ff8000 0x1000>;
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status = "okay";
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};
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vmc: vmc@41081000 {
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compatible = "nordic,nrf-vmc";
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reg = <0x41081000 0x1000>;
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status = "okay";
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};
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wdt: watchdog@4100b000 {
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compatible = "nordic,nrf-watchdog";
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reg = <0x4100b000 0x1000>;
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interrupts = <11 1>;
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status = "okay";
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label = "WDT";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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