zephyr/dts/arm/st/l4/stm32l4.dtsi
Erwan Gouriou be74a13b5b dts/arm/st: Fix I2C issues in stm32l4 series
Add clocks property in stm32l4r5 devices.
Replace i2c2 node by i2c3 node in l4.dtsi as i2c3 available
in all stm32l4 SoCs while i2c2 is not available in some parts.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-11-06 16:14:13 -05:00

304 lines
6.7 KiB
Text

/*
* Copyright (c) 2017 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/l4/stm32l4-pinctrl.dtsi>
#include <arm/armv7-m.dtsi>
#include <dt-bindings/clock/stm32_clock.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m4f";
reg = <0>;
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
soc {
flash-controller@40022000 {
compatible = "st,stm32l4-flash-controller";
label = "FLASH_CTRL";
reg = <0x40022000 0x400>;
interrupts = <4 0>;
#address-cells = <1>;
#size-cells = <1>;
flash0: flash@8000000 {
compatible = "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <8>;
erase-block-size = <2048>;
};
};
rcc: rcc@40021000 {
compatible = "st,stm32-rcc";
clocks-controller;
#clock-cells = <2>;
reg = <0x40021000 0x400>;
label = "STM32_CLK_RCC";
};
pinctrl: pin-controller@48000000 {
compatible = "st,stm32-pinmux";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x48000000 0x2000>;
gpioa: gpio@48000000 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48000000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000001>;
label = "GPIOA";
};
gpiob: gpio@48000400 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48000400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000002>;
label = "GPIOB";
};
gpioc: gpio@48000800 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48000800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000004>;
label = "GPIOC";
};
gpioh: gpio@48001c00 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48001c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000080>;
label = "GPIOH";
};
};
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00004000>;
interrupts = <37 0>;
status = "disabled";
label = "UART_1";
};
usart2: serial@40004400 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00020000>;
interrupts = <38 0>;
status = "disabled";
label = "UART_2";
};
usart3: serial@40004800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
interrupts = <39 0>;
status = "disabled";
label = "UART_3";
};
lpuart1: serial@40008000 {
compatible = "st,stm32-lpuart", "st,stm32-uart";
reg = <0x40008000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000001>;
interrupts = <70 0>;
status = "disabled";
label = "LPUART_1";
};
i2c1: i2c@40005400 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>;
interrupts = <31 0>, <32 0>;
interrupt-names = "event", "error";
status = "disabled";
label= "I2C_1";
};
i2c3: i2c@40005C00 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005C00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
interrupts = <72 0>, <73 0>;
interrupt-names = "event", "error";
status = "disabled";
label= "I2C_3";
};
spi1: spi@40013000 {
compatible = "st,stm32-spi-fifo";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;
interrupts = <35 5>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>;
status = "disabled";
label = "SPI_1";
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <36 5>;
status = "disabled";
label = "SPI_2";
};
timers1: timers@40012c00 {
compatible = "st,stm32-timers";
reg = <0x40012c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000800>;
status = "disabled";
label = "TIMERS_1";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_1";
};
};
timers2: timers@40000000 {
compatible = "st,stm32-timers";
reg = <0x40000000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000001>;
status = "disabled";
label = "TIMERS_2";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <0>;
label = "PWM_2";
};
};
timers6: timers@40001000 {
compatible = "st,stm32-timers";
reg = <0x40001000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000010>;
status = "disabled";
label = "TIMERS_6";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_6";
};
};
timers7: timers@40001400 {
compatible = "st,stm32-timers";
reg = <0x40001400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>;
status = "disabled";
label = "TIMERS_7";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_7";
};
};
timers15: timers@40014000 {
compatible = "st,stm32-timers";
reg = <0x40014000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00010000>;
status = "disabled";
label = "TIMERS_15";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_15";
};
};
timers16: timers@40014400 {
compatible = "st,stm32-timers";
reg = <0x40014400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00020000>;
status = "disabled";
label = "TIMERS_16";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_16";
};
};
can1: can@40006400 {
compatible = "st,stm32-can";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40006400 0x400>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE";
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>; //RCC_APB1ENR1_CAN1EN
status = "disabled";
label = "CAN_1";
bus-speed = <250000>;
sjw = <1>;
prop_seg_phase_seg1 = <5>;
phase_seg2 = <6>;
};
rtc: rtc@40002800 {
compatible = "st,stm32-rtc";
reg = <0x40002800 0x400>;
interrupts = <41 0>;
prescaler = <32768>;
status = "disabled";
label = "RTC_0";
};
};
};
&nvic {
arm,num-irq-priority-bits = <4>;
};