The way ESP32 XIP works (with MMU and cache) does no fit the way Zephyr XIP is implemented, causing issues related to included Zephyr linker files. Flash code still resides in flash for execution, but MMU/Cache handles it in such way that XIP might not (or should not) be used with current Zephyr approach. To address this problem, XIP configuration option is being removed from Espressif targets. Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
287 lines
7.5 KiB
Text
287 lines
7.5 KiB
Text
/*
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* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/devicetree.h>
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#include <zephyr/linker/sections.h>
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#include <zephyr/linker/linker-defs.h>
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#include <zephyr/linker/linker-tool.h>
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#include "memory.h"
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/* Disable all romable LMA */
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#undef GROUP_DATA_LINK_IN
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#define GROUP_DATA_LINK_IN(vregion, lregion) > vregion
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#define RAMABLE_REGION dram_seg
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#define RODATA_REGION dram_seg
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#define ROMABLE_REGION dram_seg
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/* Global symbols required for espressif hal build */
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MEMORY
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{
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iram_seg (RX) : org = BOOTLOADER_IRAM_SEG_START,
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len = BOOTLOADER_IRAM_SEG_LEN
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iram_loader_seg (RX) : org = BOOTLOADER_IRAM_LOADER_SEG_START,
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len = BOOTLOADER_IRAM_LOADER_SEG_LEN
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dram_seg (RW) : org = BOOTLOADER_DRAM_SEG_START,
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len = BOOTLOADER_DRAM_SEG_LEN
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#ifdef CONFIG_GEN_ISR_TABLES
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IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000
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#endif
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}
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/* Default entry point: */
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ENTRY(CONFIG_KERNEL_ENTRY)
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SECTIONS
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{
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.iram0.loader_text :
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{
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. = ALIGN (16);
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_loader_text_start = ABSOLUTE(.);
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*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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/* TODO: cross-segments calls in the libzephyr.a:device.* */
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*libapp.a:flash_map_extended.*(.literal .text .literal.* .text.*)
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*libzephyr.a:cbprintf_nano.*(.literal .text .literal.* .text.*)
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*libzephyr.a:cpu.*(.literal .text .literal.* .text.*)
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*libzephyr.a:mmu_hal.*(.literal .text .literal.* .text.*)
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*libzephyr.a:cache_hal.*(.literal .text .literal.* .text.*)
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*libzephyr.a:flash_map.*(.literal .text .literal.* .text.*)
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*libzephyr.a:esp_rom_spiflash.*(.literal .text .literal.* .text.*)
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*libzephyr.a:heap.*(.literal .text .literal.* .text.*)
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*libkernel.a:kheap.*(.literal .text .literal.* .text.*)
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*libkernel.a:mempool.*(.literal .text .literal.* .text.*)
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*(.literal.bootloader_mmap .text.bootloader_mmap)
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*(.literal.bootloader_munmap .text.bootloader_munmap)
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*libzephyr.a:esp_loader.*(.literal .text .literal.* .text.*)
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*libzephyr.a:mmu_hal.*(.literal .text .literal.* .text.*)
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*(.literal.esp_intr_disable .literal.esp_intr_disable.* .text.esp_intr_disable .text.esp_intr_disable.*)
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*(.literal.default_intr_handler .text.default_intr_handler .iram1.*.default_intr_handler)
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*(.literal.esp_log_timestamp .text.esp_log_timestamp)
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*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
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*(.literal.esp_system_abort .text.esp_system_abort)
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_loader_text_end = ABSOLUTE(.);
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_iram_end = ABSOLUTE(.);
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} > iram_loader_seg
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.iram0.text :
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{
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/* Vectors go to IRAM */
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_iram_start = ABSOLUTE(.);
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_init_start = ABSOLUTE(.);
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__text_region_start = ABSOLUTE(.);
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KEEP(*(.exception_vectors.text));
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. = ALIGN(256);
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_invalid_pc_placeholder = ABSOLUTE(.);
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_iram_text_start = ABSOLUTE(.);
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KEEP(*(.exception.entry*)); /* contains _isr_wrapper */
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*(.exception.other*)
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. = ALIGN(4);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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. = ALIGN(4);
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*(.iram1 .iram1.*)
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*(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
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/* C2 memprot requires 512 B alignment for split lines */
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. = ALIGN (16);
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_init_end = ABSOLUTE(.);
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. = ALIGN(16);
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*(.iram.data)
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*(.iram.data*)
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. = ALIGN(16);
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*(.iram.bss)
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*(.iram.bss*)
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. = ALIGN(16);
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*(.literal .text .literal.* .text.*)
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*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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/* CPU will try to prefetch up to 16 bytes of
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* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
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* safe access to up to 16 bytes after the last real instruction, add
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* dummy bytes to ensure this
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*/
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. += 16;
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_text_end = ABSOLUTE(.);
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__text_region_end = ABSOLUTE(.);
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_etext = .;
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/* Similar to _iram_start, this symbol goes here so it is
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* resolved by addr2line in preference to the first symbol in
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* the flash.text segment.
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*/
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_flash_cache_start = ABSOLUTE(0);
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} > iram_seg
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.dram0.data :
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{
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. = ALIGN(4);
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__data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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#ifdef CONFIG_RISCV_GP
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__global_pointer$ = . + 0x800;
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#endif /* CONFIG_RISCV_GP */
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*libzephyr.a:mmu_hal.*(.rodata .rodata.*)
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*libzephyr.a:rtc_clk.*(.rodata .rodata.*)
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KEEP(*(.jcr))
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*(.dram1 .dram1.*)
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. = ALIGN(4);
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#include <snippets-rwdata.ld>
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. = ALIGN(4);
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*(.rodata_desc .rodata_desc.*)
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*(.rodata_custom_desc .rodata_custom_desc.*)
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. = ALIGN(4);
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#include <snippets-rodata.ld>
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. = ALIGN(4);
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*(.rodata)
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*(.rodata.*)
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*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table .gcc_except_table.*)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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. = (. + 3) & ~ 3;
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__eh_frame = ABSOLUTE(.);
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KEEP(*(.eh_frame))
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. = (. + 7) & ~ 3;
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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__rodata_region_end = .;
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_rodata_end = ABSOLUTE(.);
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/* Literals are also RO data. */
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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. = ALIGN(4);
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_thread_local_start = ABSOLUTE(.);
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*(.tdata)
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*(.tdata.*)
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*(.tbss)
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*(.tbss.*)
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*(.srodata)
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*(.srodata.*)
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*(.rodata)
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*(.rodata.*)
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*(.rodata_wlog)
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*(.rodata_wlog*)
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_thread_local_end = ABSOLUTE(.);
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/* _rodata_reserved_end = ABSOLUTE(.); */
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. = ALIGN(4);
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} > dram_seg
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#include <zephyr/linker/common-rom/common-rom-init.ld>
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#include <zephyr/linker/common-rom/common-rom-kernel-devices.ld>
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#include <zephyr/linker/common-rom/common-rom-debug.ld>
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#include <zephyr/linker/common-rom/common-rom-misc.ld>
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#include <snippets-sections.ld>
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#include <zephyr/linker/cplusplus-rom.ld>
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#include <zephyr/linker/thread-local-storage.ld>
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#include <snippets-data-sections.ld>
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#include <zephyr/linker/common-ram.ld>
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#include <snippets-ram-sections.ld>
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#include <zephyr/linker/cplusplus-ram.ld>
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#include <zephyr/linker/common-rom/common-rom-logging.ld>
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.noinit (NOLOAD):
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{
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. = ALIGN(4);
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*(.noinit)
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*(.noinit.*)
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. = ALIGN(4);
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} > dram_seg
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/* Shared RAM */
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.bss (NOLOAD):
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{
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. = ALIGN (8);
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_bss_start = ABSOLUTE(.);
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__bss_start = ABSOLUTE(.);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.share.mem)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN (8);
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__bss_end = ABSOLUTE(.);
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_bss_end = ABSOLUTE(.);
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} > dram_seg
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/* linker rel sections*/
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#include <zephyr/linker/rel-sections.ld>
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#ifdef CONFIG_GEN_ISR_TABLES
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#include <zephyr/linker/intlist.ld>
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#endif
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#include <zephyr/linker/debug-sections.ld>
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/DISCARD/ : { *(.note.GNU-stack) }
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SECTION_PROLOGUE(.riscv.attributes, 0,)
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{
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KEEP(*(.riscv.attributes))
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KEEP(*(.gnu.attributes))
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}
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}
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