Michael Hope
ba21de582b
This adds support for the SAM0 DMA Controller (DMAC). Chained transfer are not currently implemented. Tested with tests/drivers/dma/loop_transfer and custom modifications to that test using three parallel reloading channels. Also tested with a trivial program that did memory->serial. Signed-off-by: Michael Hope <mlhx@google.com> [hageman@inthat.cloud: Rebased and updated commit message] Signed-off-by: Derek Hageman <hageman@inthat.cloud>
65 lines
960 B
Text
65 lines
960 B
Text
/*
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* Copyright (c) 2019 Benjamin Valentin
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <atmel/samd.dtsi>
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/ {
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soc {
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usb0: usb@41005000 {
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compatible = "atmel,sam0-usb";
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status = "disabled";
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reg = <0x41005000 0x1000>;
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interrupts = <7 0>;
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num-bidir-endpoints = <8>;
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label = "USB0";
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};
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dma: dmac@41004800 {
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compatible = "atmel,sam0-dmac";
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reg = <0x41004800 0x50>;
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interrupts = <6 0>;
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label = "DMA_0";
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};
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portc: gpio@41004500 {
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compatible = "atmel,sam0-gpio";
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reg = <0x41004500 0x80>;
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label = "PORTC";
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gpio-controller;
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#gpio-cells = <2>;
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};
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pinmux_c: pinmux@41004500 {
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compatible = "atmel,sam0-pinmux";
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reg = <0x41004500 0x80>;
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label = "PINMUX_C";
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};
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};
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};
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&sercom0 {
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interrupts = <9 0>;
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};
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&sercom1 {
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interrupts = <10 0>;
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};
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&sercom2 {
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interrupts = <11 0>;
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};
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&sercom3 {
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interrupts = <12 0>;
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};
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&sercom4 {
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interrupts = <13 0>;
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};
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&sercom5 {
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interrupts = <14 0>;
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};
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