zephyr

History

Daniel Leung ad6ed299b7 arm/nxp_kinetis/k6x: always inline clock init function The clkInit() is always called so this can be inlined. This saves 32 bytes of ROM space compared to non-inlined version. Change-Id: I2cb6d02c0996acad16029be243f6059183938089 Signed-off-by: Daniel Leung <daniel.leung@intel.com>		2016-05-03 12:43:31 +00:00
..
Kbuild	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
Kconfig.defconfig.mk64f12	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
Kconfig.defconfig.series	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
Kconfig.series	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
Kconfig.soc	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
linker.cmd	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
Makefile	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
README.txt	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
soc.c	arm/nxp_kinetis/k6x: always inline clock init function	2016-05-03 12:43:31 +00:00
soc.h	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
soc_config.c	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00
wdog.S	kinetis: reorganise soc directory using soc family	2016-04-18 21:24:58 +00:00

README.txt

Notes on the FSL FRDM K64F SRAM base address and size

Although the K64F CPU has 64 kB of SRAM at 0x1FFF0000 (code space), it is not
used by the FSL FRDM K64F platform.  Only the 192 kB region based at the
standard ARMv7-M SRAM base address of 0x20000000 is supported.

As such the following values are used:

CONFIG_SRAM_BASE_ADDRESS=0x20000000
CONFIG_SRAM_SIZE=64      # Measured in kB