abf6fdfed1
This makes the sequence completed before hardware devices initialization. Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
60 lines
1.6 KiB
C
60 lines
1.6 KiB
C
/*
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* Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file configuration macros for riscv SOCs supporting the riscv
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* privileged architecture specification
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*/
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#ifndef __SOC_COMMON_H_
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#define __SOC_COMMON_H_
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#include "chip_chipregs.h"
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/* SOC-specific MCAUSE bitfields */
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/* Interrupt Mask. 1 (interrupt) or 0 (exception) */
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#define SOC_MCAUSE_IRQ_MASK BIT(31)
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/* Exception code Mask */
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#define SOC_MCAUSE_EXP_MASK 0x7FFFFFFF
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/* Exception code of environment call from M-mode */
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#define SOC_MCAUSE_ECALL_EXP 11
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/* SOC-Specific EXIT ISR command */
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#define SOC_ERET mret
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#ifndef _ASMLANGUAGE
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#if CONFIG_ITE_IT8XXX2_INTC
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/*
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* Save current interrupt state of soc-level into ier_setting[] with
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* disabling interrupt.
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*/
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void ite_intc_save_and_disable_interrupts(void);
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/* Restore interrupt state of soc-level from ier_setting[], use with care. */
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void ite_intc_restore_interrupts(void);
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extern void ite_intc_irq_enable(unsigned int irq);
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extern void ite_intc_irq_disable(unsigned int irq);
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extern uint8_t ite_intc_get_irq_num(void);
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extern int ite_intc_irq_is_enable(unsigned int irq);
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extern void ite_intc_irq_polarity_set(unsigned int irq, unsigned int flags);
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extern void ite_intc_isr_clear(unsigned int irq);
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void ite_intc_init(void);
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#endif /* CONFIG_ITE_IT8XXX2_INTC */
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#ifdef CONFIG_SOC_IT8XXX2_PLL_FLASH_48M
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void timer_5ms_one_shot(void);
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#endif
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void chip_pll_ctrl(enum chip_pll_mode mode);
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void riscv_idle(enum chip_pll_mode mode, unsigned int key);
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#endif /* !_ASMLANGUAGE */
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#endif /* __SOC_COMMON_H_ */
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