a9f5382861
Add more specific compatible strings to existing atmel,at24 compatible I2C EEPROMs where known. This is strictly for documentation purposes, no functional changes introduced. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
95 lines
1.9 KiB
Text
95 lines
1.9 KiB
Text
/*
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (C) 2021, Intel Corporation
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* Description:
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* Main Device Tree source of the Cyclone V SoC DevKit
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* this file is based on the GSRD DTS for Linux
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*/
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#include "intel_socfpga_std/socfpga_cyclonev.dtsi"
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#include <zephyr/dt-bindings/gpio/gpio.h>
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/ {
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model = "Altera SOCFPGA Cyclone V SoC Development Kit";
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compatible = "altr,socfpga-cyclonev-socdk", "altr,socfpga-cyclonev", "altr,socfpga";
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ddr0: memory@0 {
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name = "memory";
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device_type = "memory";
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reg = <0x0 0x40000000>; /* 1GB */
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};
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aliases {
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/* Giving different names to the LEDs connected to the HPS side of the chip */
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led0 = &hps0;
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led1 = &hps1;
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led2 = &hps2;
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led3 = &hps3;
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eeprom-0 = &eeprom;
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};
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leds {
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compatible = "gpio-leds";
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hps3: hps_led_3 {
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gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
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};
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hps2: hps_led_2 {
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gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
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};
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hps1: hps_led_1 {
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gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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};
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hps0: hps_led_0 {
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gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
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};
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};
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soc {
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gmac1: ethernet@ff702000 {
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status = "okay";
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local-mac-address = [e6 88 2d 82 1f d4];
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};
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gpio0: gpio@ff708000 {
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status = "okay";
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};
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gpio1: gpio@ff709000 {
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status = "okay";
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};
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gpio2: gpio@ff70a000 {
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status = "okay";
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};
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i2c0: i2c@ffc04000 {
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status = "okay";
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eeprom: eeprom@51 {
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compatible = "microchip,at24lc32a", "atmel,at24";
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status = "okay";
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reg = <0x51>;
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size = <4096>;
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address-width = <8>;
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timeout = <25>;
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pagesize = <32>;
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};
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ds3231: rtc@68 {
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compatible = "maxim,ds3231";
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reg = <0x68>;
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};
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};
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};
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/* Configuring Zephyr mandatory devices */
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chosen {
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zephyr,sram = &ddr0;
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/*zephyr,flash = &flash0;*/
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zephyr,console = &uart0;
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zephyr,shell-uart = &uart0;
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zephyr,ocm = &ocram;
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};
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};
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zephyr_udc0: &usb1 {
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compatible = "snps,dwc2";
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status = "okay";
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};
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