a8167ab17d
move pinmux.h to drivers/pinmux.h and create a shim for backward-compatibility. No functional changes to the headers. A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES. Related to #16539 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
82 lines
2.3 KiB
C
82 lines
2.3 KiB
C
/*
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* Copyright (c) 2018 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <device.h>
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#include <init.h>
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#include <kernel.h>
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#include <drivers/pinmux.h>
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#include "soc.h"
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static int board_pinmux_init(struct device *dev)
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{
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ARG_UNUSED(dev);
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#ifdef CONFIG_PINMUX_XEC_GPIO000_036
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struct device *porta =
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device_get_binding(CONFIG_PINMUX_XEC_GPIO000_036_NAME);
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#endif
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#ifdef CONFIG_PINMUX_XEC_GPIO040_076
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struct device *portb =
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device_get_binding(CONFIG_PINMUX_XEC_GPIO040_076_NAME);
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#endif
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#ifdef CONFIG_PINMUX_XEC_GPIO100_136
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struct device *portc =
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device_get_binding(CONFIG_PINMUX_XEC_GPIO100_136_NAME);
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#endif
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#ifdef CONFIG_PINMUX_XEC_GPIO140_176
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struct device *portd =
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device_get_binding(CONFIG_PINMUX_XEC_GPIO140_176_NAME);
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#endif
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#ifdef CONFIG_PINMUX_XEC_GPIO200_236
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struct device *porte =
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device_get_binding(CONFIG_PINMUX_XEC_GPIO200_236_NAME);
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#endif
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#ifdef CONFIG_PINMUX_XEC_GPIO240_276
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struct device *portf =
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device_get_binding(CONFIG_PINMUX_XEC_GPIO240_276_NAME);
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#endif
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/* Release JTAG TDI and JTAG TDO pins so they can be
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* controlled by their respective PCR register (UART2).
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* For more details see table 44-1
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*/
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ECS_REGS->DEBUG_CTRL |= 0x4;
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/* See table 2-4 from the data sheet for pin multiplexing*/
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#ifdef CONFIG_UART_NS16550_PORT_2
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/* Set muxing, for UART 2 TX/RX and power up */
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mchp_pcr_periph_slp_ctrl(PCR_UART2, MCHP_PCR_SLEEP_DIS);
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UART2_REGS->CFG_SEL = (MCHP_UART_LD_CFG_INTCLK +
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MCHP_UART_LD_CFG_RESET_SYS + MCHP_UART_LD_CFG_NO_INVERT);
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UART2_REGS->ACTV = MCHP_UART_LD_ACTIVATE;
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pinmux_pin_set(portd, MCHP_GPIO_145, MCHP_GPIO_CTRL_MUX_F2);
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pinmux_pin_set(portd, MCHP_GPIO_146, MCHP_GPIO_CTRL_MUX_F2);
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#endif
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#ifdef CONFIG_I2C_XEC_0
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/* Set muxing, for I2C0 - SMB00 */
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pinmux_pin_set(porta, MCHP_GPIO_003, MCHP_GPIO_CTRL_MUX_F1);
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pinmux_pin_set(porta, MCHP_GPIO_004, MCHP_GPIO_CTRL_MUX_F1);
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#endif
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#ifdef CONFIG_I2C_XEC_1
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/* Set muxing for I2C1 - SMB01 */
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pinmux_pin_set(portc, MCHP_GPIO_130, MCHP_GPIO_CTRL_MUX_F1);
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pinmux_pin_set(portc, MCHP_GPIO_131, MCHP_GPIO_CTRL_MUX_F1);
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#endif
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#ifdef CONFIG_I2C_XEC_2
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/* Set muxing, for I2C2 - SMB04 */
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pinmux_pin_set(portd, MCHP_GPIO_143, MCHP_GPIO_CTRL_MUX_F1);
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pinmux_pin_set(portd, MCHP_GPIO_144, MCHP_GPIO_CTRL_MUX_F1);
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#endif
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return 0;
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}
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SYS_INIT(board_pinmux_init, PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY);
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