a746bcd56d
Now that we can utilize label in the device tree we can convert to getting the device name for the NXP Kinetis UART out of the device tree instead of from Kconfig. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
186 lines
3.5 KiB
Text
186 lines
3.5 KiB
Text
#include <arm/armv6-m.dtsi>
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/ {
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cpus {
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cpu@0 {
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compatible = "arm,cortex-m0+";
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};
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};
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sram0: memory {
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compatible = "mmio-sram";
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reg = <0x20000000 0x20000>;
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};
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soc {
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mcg: clock-controller@40064000 {
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compatible = "nxp,kw41z-mcg";
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reg = <0x40064000 0x13>;
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system-clock-frequency = <48000000>;
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clock-controller;
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};
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clock-controller@40065000 {
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compatible = "nxp,kw41z-osc";
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reg = <0x40065000 0x4>;
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enable-external-reference;
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};
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rtc@4003d000 {
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compatible = "nxp,kw41z-rtc";
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reg = <0x4003d000 0x20>;
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clock-frequency = <32768>;
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};
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sim: sim@40047000 {
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compatible = "nxp,kw41z-sim";
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reg = <0x40047000 0x1060>;
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clock-controller;
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#clock-cells = <2>;
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};
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flash0: flash@0 {
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reg = <0 0x80000>;
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};
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lpuart0: lpuart@40054000 {
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compatible = "nxp,kw41z-lpuart";
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reg = <0x40054000 0x18>;
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interrupts = <12 0>;
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label = "UART_0";
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pinctrl-0 = <&lpuart0_default>;
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pinctrl-names = "default";
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status = "disabled";
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};
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pinmux_a: pinmux@40049000 {
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compatible = "nxp,kw41z-pinmux";
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reg = <0x40049000 0xa4>;
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clocks = <&sim 0x1038 9>;
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spi1_default: spi1_default {
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mosi-miso-sck-pcs0 {
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pins = <16>, <17>, <18>, <19>;
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function = <2>;
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};
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};
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};
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pinmux_b: pinmux@4004a000 {
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compatible = "nxp,kw41z-pinmux";
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reg = <0x4004a000 0xa4>;
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clocks = <&sim 0x1038 10>;
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};
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pinmux_c: pinmux@4004b000 {
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compatible = "nxp,kw41z-pinmux";
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reg = <0x4004b000 0xa4>;
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clocks = <&sim 0x1038 11>;
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lpuart0_default: lpuart0_default {
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rx-tx {
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pins = <6>, <7>;
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function = <4>;
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};
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};
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lpuart0_alt1: lpuart0_alt1 {
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rx-tx {
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pins = <17>, <18>;
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function = <4>;
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};
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};
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lpuart0_alt2: lpuart0_alt2 {
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rx-tx-cts-rts {
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pins = <2>, <3>, <0>, <1>;
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function = <4>;
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};
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};
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spi0_default: spi0_default {
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mosi-miso-clk-pcs0 {
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pins = <18>, <17>, <16>, <19>;
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function = <2>;
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};
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};
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};
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gpioa: gpio@400ff000 {
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compatible = "nxp,kw41z-gpio";
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reg = <0x400ff000 0x40>;
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interrupts = <30 2>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiob: gpio@400ff040 {
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compatible = "nxp,kw41z-gpio";
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reg = <0x400ff040 0x40>;
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interrupts = <31 2>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioc: gpio@400ff080 {
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compatible = "nxp,kw41z-gpio";
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reg = <0x400ff080 0x40>;
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interrupts = <31 2>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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spi0: spi@4002c000 {
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compatible = "nxp,kw41z-spi";
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reg = <0x4002c000 0x9C>;
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interrupts = <10 0>;
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clocks = <&sim 0x103C 12>; /* clk gate */
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cs = <&gpiob 18 0>, <&gpiob 17 0>;
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pinctrl-0 = <&spi0_default>;
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pinctrl-names = "default";
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};
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spi1: spi@4002d000 {
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compatible = "nxp,kw41z-spi";
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reg = <0x4002d000 0x9C>;
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interrupts = <29 0>;
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clocks = <&sim 0x103C 13>; /* clk gate */
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status = "disabled";
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};
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pwm0: pwm@40038000 {
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compatible = "nxp,kw41z-pwm";
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reg = <0x40038000 0x88>;
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prescaler = <2>;
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period = <1000>;
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clock-source = <0>;
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/* channel information needed - fixme */
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};
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pwm1: pwm@40039000 {
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compatible = "nxp,kw41z-pwm";
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reg = <0x40039000 0x88>;
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prescaler = <2>;
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period = <1000>;
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clock-source = <0>;
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/* channel information needed - fixme */
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};
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pwm2: pwm@4003a000 {
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compatible = "nxp,kw41z-pwm";
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reg = <0x4003a000 0x88>;
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prescaler = <2>;
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period = <1000>;
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clock-source = <0>;
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/* channel information needed - fixme */
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <2>;
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};
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