9c76d28bee
Line up everything nicely, add leading '0x' to hex addresses, and remove redundant newlines. Add whitespace between the register name and contents so the contents can be easily selected from a terminal. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
41 lines
1.1 KiB
C
41 lines
1.1 KiB
C
/*
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* Copyright (c) 2019 Intel Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <ksched.h>
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#include <kernel_structs.h>
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#include <kernel_internal.h>
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#include <logging/log.h>
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LOG_MODULE_DECLARE(os);
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void z_x86_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
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{
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if (esf != NULL) {
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LOG_ERR("RIP: 0x%016lx RSP: 0x%016lx RFLAGS: 0x%016lx",
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esf->rip, esf->rsp, esf->rflags);
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LOG_ERR("RAX: 0x%016lx RBX: 0x%016lx RCX: 0x%016lx RDX: 0x%016lx",
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esf->rax, esf->rbx, esf->rcx, esf->rdx);
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LOG_ERR("RSI: 0x%016lx RDI: 0x%016lx RBP: 0x%016lx RSP: 0x%016lx",
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esf->rsi, esf->rdi, esf->rbp, esf->rsp);
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LOG_ERR(" R8: 0x%016lx R9: 0x%016lx R10: 0x%016lx R11: 0x%016lx",
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esf->r8, esf->r9, esf->r10, esf->r11);
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LOG_ERR("R12: 0x%016lx R13: 0x%016lx R14: 0x%016lx R15: 0x%016lx",
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esf->r12, esf->r13, esf->r14, esf->r15);
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}
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z_fatal_error(reason, esf);
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}
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void z_x86_exception(const z_arch_esf_t *esf)
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{
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LOG_ERR("** CPU Exception %ld (code %ld/0x%lx) **",
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esf->vector, esf->code, esf->code);
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z_x86_fatal_error(K_ERR_CPU_EXCEPTION, esf);
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}
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