This code component is used to add Zephyr support on iMX6SX processors, exclusively on Cortex M4 core, and to speed up the development process it was decided to have it based on NXP FreeRTOS BSP implementation. The i.MX FreeRTOS BSP is split into separate downloadable packages, based on SoC. The packages share most of the peripheral driver files and here they are combined together. The source code was imported from the following folders: FreeRTOS_BSP_1.0.1_iMX6SX/platform/drivers FreeRTOS_BSP_1.0.1_iMX6SX/platform/devices This source code depends on headers and sources from zephyr: ext/hal/cmsis Origin: i.MX 6SoloX FreeRTOS BSP 1.0.1 for Cortex-M4 Peripheral Driver License: BSD 3-Clause URL: https://www.nxp.com/webapp/Download?colCode=FreeRTOS_MX6SX_1.0.1_LINUX&appType=license commit: no commit hash Purpose: The peripheral driver wraps the H/W for i.MX6SX M4 core Maintained-by: External Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
519 lines
19 KiB
C
Executable file
519 lines
19 KiB
C
Executable file
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "adc_imx6sx.h"
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/*******************************************************************************
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* Code
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******************************************************************************/
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_Init
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* Description : Initialize ADC to reset state and initialize with initialize
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* structure.
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*
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*END**************************************************************************/
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void ADC_Init(ADC_Type* base, const adc_init_config_t* initConfig)
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{
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assert(initConfig);
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/* Reset ADC register to its default value. */
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ADC_Deinit(base);
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/* Set hardware average function and number. */
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if (initConfig->averageNumber != adcAvgNumNone)
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{
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ADC_GC_REG(base) |= ADC_GC_AVGE_MASK;
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ADC_CFG_REG(base) |= ADC_CFG_AVGS(initConfig->averageNumber);
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}
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/* Set resolution mode. */
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ADC_CFG_REG(base) |= ADC_CFG_MODE(initConfig->resolutionMode);
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/* Set clock source. */
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ADC_SetClockSource(base, initConfig->clockSource, initConfig->divideRatio);
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_Deinit
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* Description : This function reset ADC module register content to its
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* default value.
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*
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*END**************************************************************************/
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void ADC_Deinit(ADC_Type* base)
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{
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/* Reset ADC Module Register content to default value */
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ADC_HC0_REG(base) = ADC_HC0_ADCH_MASK;
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ADC_HC1_REG(base) = ADC_HC1_ADCH_MASK;
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ADC_R0_REG(base) = 0x0;
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ADC_R1_REG(base) = 0x0;
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ADC_CFG_REG(base) = ADC_CFG_ADSTS(2);
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ADC_GC_REG(base) = 0x0;
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ADC_GS_REG(base) = ADC_GS_CALF_MASK | ADC_GS_AWKST_MASK;
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ADC_CV_REG(base) = 0x0;
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ADC_OFS_REG(base) = 0x0;
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ADC_CAL_REG(base) = 0x0;
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_SetConvertResultOverwrite
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* Description : Enable or disable ADC overwrite conversion result register.
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*
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*END**************************************************************************/
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void ADC_SetConvertResultOverwrite(ADC_Type* base, bool enable)
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{
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if(enable)
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ADC_CFG_REG(base) |= ADC_CFG_OVWREN_MASK;
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else
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ADC_CFG_REG(base) &= ~ADC_CFG_OVWREN_MASK;
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_SetConvertTrigMode
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* Description : This function is used to set conversion trigger mode.
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*
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*END**************************************************************************/
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void ADC_SetConvertTrigMode(ADC_Type* base, uint8_t mode)
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{
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assert(mode <= adcHardwareTrigger);
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if(mode == adcHardwareTrigger)
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ADC_CFG_REG(base) |= ADC_CFG_ADTRG_MASK;
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else
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ADC_CFG_REG(base) &= ~ADC_CFG_ADTRG_MASK;
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_SetConvertSpeed
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* Description : This function is used to set conversion speed mode.
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*
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*END**************************************************************************/
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void ADC_SetConvertSpeed(ADC_Type* base, uint8_t mode)
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{
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assert(mode <= adcHighSpeed);
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if(mode == adcHighSpeed)
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ADC_CFG_REG(base) |= ADC_CFG_ADHSC_MASK;
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else
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ADC_CFG_REG(base) &= ~ADC_CFG_ADHSC_MASK;
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_SetSampleTimeDuration
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* Description : This function is used to set sample time duration.
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*
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*END**************************************************************************/
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void ADC_SetSampleTimeDuration(ADC_Type* base, uint8_t duration)
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{
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assert(duration <= adcSamplePeriodClock24);
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switch(duration)
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{
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case adcSamplePeriodClock2:
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ADC_CFG_REG(base) &= ~ADC_CFG_ADLSMP_MASK;
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ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) |
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ADC_CFG_ADSTS(0U);
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break;
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case adcSamplePeriodClock4:
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ADC_CFG_REG(base) &= ~ADC_CFG_ADLSMP_MASK;
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ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) |
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ADC_CFG_ADSTS(1U);
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break;
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case adcSamplePeriodClock6:
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ADC_CFG_REG(base) &= ~ADC_CFG_ADLSMP_MASK;
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ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) |
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ADC_CFG_ADSTS(2U);
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break;
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case adcSamplePeriodClock8:
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ADC_CFG_REG(base) &= ~ADC_CFG_ADLSMP_MASK;
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ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) |
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ADC_CFG_ADSTS(3U);
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break;
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case adcSamplePeriodClock12:
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ADC_CFG_REG(base) |= ADC_CFG_ADLSMP_MASK;
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ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) |
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ADC_CFG_ADSTS(0U);
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break;
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case adcSamplePeriodClock16:
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ADC_CFG_REG(base) |= ADC_CFG_ADLSMP_MASK;
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ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) |
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ADC_CFG_ADSTS(1U);
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break;
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case adcSamplePeriodClock20:
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ADC_CFG_REG(base) |= ADC_CFG_ADLSMP_MASK;
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ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) |
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ADC_CFG_ADSTS(2U);
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break;
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case adcSamplePeriodClock24:
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ADC_CFG_REG(base) |= ADC_CFG_ADLSMP_MASK;
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ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) |
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ADC_CFG_ADSTS(3U);
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break;
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}
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_SetPowerMode
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* Description : This function is used to set power mode.
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*
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*END**************************************************************************/
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void ADC_SetPowerMode(ADC_Type* base, uint8_t powerMode)
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{
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assert(powerMode <= adcLowPowerMode);
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if(powerMode == adcLowPowerMode)
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ADC_CFG_REG(base) |= ADC_CFG_ADLPC_MASK;
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else
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ADC_CFG_REG(base) &= ~ADC_CFG_ADLPC_MASK;
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_SetClockSource
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* Description : This function is used to set ADC clock source.
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*
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*END**************************************************************************/
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void ADC_SetClockSource(ADC_Type* base, uint8_t source, uint8_t div)
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{
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assert(source <= adcAsynClock);
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assert(div <= adcInputClockDiv8);
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ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADIV_MASK)) |
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ADC_CFG_ADIV(div);
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ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADICLK_MASK)) |
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ADC_CFG_ADICLK(source);
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_SetAsynClockOutput
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* Description : This function is used to enable asynchronous clock source output
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* regardless of the state of ADC.
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*
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*END**************************************************************************/
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void ADC_SetAsynClockOutput(ADC_Type* base, bool enable)
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{
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if(enable)
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ADC_GC_REG(base) |= ADC_GC_ADACKEN_MASK;
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else
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ADC_GC_REG(base) &= ~ADC_GC_ADACKEN_MASK;
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_SetCalibration
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* Description : Enable or disable calibration function.
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*
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*END**************************************************************************/
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void ADC_SetCalibration(ADC_Type* base, bool enable)
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{
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if(enable)
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ADC_GC_REG(base) |= ADC_GC_CAL_MASK;
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else
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ADC_GC_REG(base) &= ~ADC_GC_CAL_MASK;
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_SetConvertCmd
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* Description : Enable continuous conversion and start a conversion on target channel.
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* This function is only used for software trigger mode. If configured as
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* hardware trigger mode, this function just enable continuous conversion
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* and not start the conversion.
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*
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*END**************************************************************************/
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void ADC_SetConvertCmd(ADC_Type* base, uint8_t channel, bool enable)
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{
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uint8_t triggerMode;
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/* Enable continuous conversion. */
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if(enable)
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{
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ADC_GC_REG(base) |= ADC_GC_ADCO_MASK;
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/* Start the conversion. */
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triggerMode = ADC_GetConvertTrigMode(base);
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if(triggerMode == adcSoftwareTrigger)
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ADC_HC0_REG(base) = (ADC_HC0_REG(base) & (~ADC_HC0_ADCH_MASK)) |
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ADC_HC0_ADCH(channel);
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else /* Just set the channel. */
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ADC_HC1_REG(base) = (ADC_HC1_REG(base) & (~ADC_HC1_ADCH_MASK)) |
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ADC_HC1_ADCH(channel);
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}
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else
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ADC_GC_REG(base) &= ~ADC_GC_ADCO_MASK;
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_TriggerSingleConvert
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* Description : Enable single conversion and trigger single time conversion
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* on target imput channel. If configured as hardware trigger
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* mode, this function just set input channel and not start a
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* conversion.
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*
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*END**************************************************************************/
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void ADC_TriggerSingleConvert(ADC_Type* base, uint8_t channel)
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{
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uint8_t triggerMode;
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/* Enable single conversion. */
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ADC_GC_REG(base) &= ~ADC_GC_ADCO_MASK;
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/* Start the conversion. */
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triggerMode = ADC_GetConvertTrigMode(base);
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if(triggerMode == adcSoftwareTrigger)
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ADC_HC0_REG(base) = (ADC_HC0_REG(base) & (~ADC_HC0_ADCH_MASK)) |
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ADC_HC0_ADCH(channel);
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else /* Just set the channel. */
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ADC_HC1_REG(base) = (ADC_HC1_REG(base) & (~ADC_HC1_ADCH_MASK)) |
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ADC_HC1_ADCH(channel);
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_SetAverageNum
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* Description : This function is used to enable hardware aaverage function
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* and set hardware average number. If avgNum is equal to
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* adcAvgNumNone, it means disable hardware average function.
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*
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*END**************************************************************************/
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void ADC_SetAverageNum(ADC_Type* base, uint8_t avgNum)
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{
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assert(avgNum <= adcAvgNumNone);
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if(avgNum != adcAvgNumNone)
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{
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/* Enable hardware average function. */
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ADC_GC_REG(base) |= ADC_GC_AVGE_MASK;
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/* Set hardware average number. */
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ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_AVGS_MASK)) |
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ADC_CFG_AVGS(avgNum);
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}
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else
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{
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/* Disable hardware average function. */
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ADC_GC_REG(base) &= ~ADC_GC_AVGE_MASK;
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}
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_StopConvert
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* Description : This function is used to stop all conversions.
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*
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*END**************************************************************************/
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void ADC_StopConvert(ADC_Type* base)
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{
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uint8_t triggerMode;
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triggerMode = ADC_GetConvertTrigMode(base);
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/* According trigger mode to set specific register. */
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if(triggerMode == adcSoftwareTrigger)
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ADC_HC0_REG(base) |= ADC_HC0_ADCH_MASK;
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else
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ADC_HC1_REG(base) |= ADC_HC1_ADCH_MASK;
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_GetConvertResult
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* Description : This function is used to get conversion result.
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*
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*END**************************************************************************/
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uint16_t ADC_GetConvertResult(ADC_Type* base)
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{
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uint8_t triggerMode;
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triggerMode = ADC_GetConvertTrigMode(base);
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if(triggerMode == adcSoftwareTrigger)
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return (uint16_t)((ADC_R0_REG(base) & ADC_R0_D_MASK) >> ADC_R0_D_SHIFT);
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else
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return (uint16_t)((ADC_R1_REG(base) & ADC_R1_D_MASK) >> ADC_R1_D_SHIFT);
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_SetCmpMode
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* Description : This function is used to enable compare function
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* and set comparer mode.
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*
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*END**************************************************************************/
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void ADC_SetCmpMode(ADC_Type* base, uint8_t cmpMode, uint16_t cmpVal1, uint16_t cmpVal2)
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{
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assert(cmpMode <= adcCmpModeDisable);
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switch(cmpMode)
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{
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case adcCmpModeLessThanCmpVal1:
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ADC_GC_REG(base) |= ADC_GC_ACFE_MASK;
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ADC_GC_REG(base) &= ~(ADC_GC_ACFGT_MASK | ADC_GC_ACREN_MASK);
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ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV1_MASK)) | ADC_CV_CV1(cmpVal1);
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break;
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case adcCmpModeGreaterThanCmpVal1:
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ADC_GC_REG(base) |= ADC_GC_ACFE_MASK;
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ADC_GC_REG(base) = (ADC_GC_REG(base) | ADC_GC_ACFGT_MASK) & (~ADC_GC_ACREN_MASK);
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ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV1_MASK)) | ADC_CV_CV1(cmpVal1);
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break;
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case adcCmpModeOutRangNotInclusive:
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ADC_GC_REG(base) |= ADC_GC_ACFE_MASK;
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ADC_GC_REG(base) = (ADC_GC_REG(base) | ADC_GC_ACREN_MASK) & (~ADC_GC_ACFGT_MASK);
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if(cmpVal1 <= cmpVal2)
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{
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ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV1_MASK)) | ADC_CV_CV1(cmpVal1);
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ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV2_MASK)) | ADC_CV_CV2(cmpVal2);
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}
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break;
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case adcCmpModeInRangNotInclusive:
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ADC_GC_REG(base) |= ADC_GC_ACFE_MASK;
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ADC_GC_REG(base) = (ADC_GC_REG(base) | ADC_GC_ACREN_MASK) & (~ADC_GC_ACFGT_MASK);
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if(cmpVal1 > cmpVal2)
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{
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ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV1_MASK)) | ADC_CV_CV1(cmpVal1);
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ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV2_MASK)) | ADC_CV_CV2(cmpVal2);
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}
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break;
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case adcCmpModeInRangInclusive:
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ADC_GC_REG(base) |= ADC_GC_ACFE_MASK;
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ADC_GC_REG(base) |= ADC_GC_ACREN_MASK | ADC_GC_ACFGT_MASK;
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if(cmpVal1 <= cmpVal2)
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{
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ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV1_MASK)) | ADC_CV_CV1(cmpVal1);
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ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV2_MASK)) | ADC_CV_CV2(cmpVal2);
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}
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break;
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case adcCmpModeOutRangInclusive:
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ADC_GC_REG(base) |= ADC_GC_ACFE_MASK;
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ADC_GC_REG(base) |= ADC_GC_ACREN_MASK | ADC_GC_ACFGT_MASK;
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if(cmpVal1 > cmpVal2)
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{
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ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV1_MASK)) | ADC_CV_CV1(cmpVal1);
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ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV2_MASK)) | ADC_CV_CV2(cmpVal2);
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}
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break;
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case adcCmpModeDisable:
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ADC_GC_REG(base) &= ~ADC_GC_ACFE_MASK;
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break;
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}
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}
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/*FUNCTION**********************************************************************
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*
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* Function Name : ADC_SetCorrectionMode
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* Description : This function is used to set offset correct mode.
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*
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*END**************************************************************************/
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void ADC_SetCorrectionMode(ADC_Type* base, bool correctMode)
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{
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if(correctMode)
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ADC_OFS_REG(base) |= ADC_OFS_SIGN_MASK;
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else
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ADC_OFS_REG(base) &= ~ADC_OFS_SIGN_MASK;
|
|
}
|
|
|
|
/*FUNCTION**********************************************************************
|
|
*
|
|
* Function Name : ADC_SetIntCmd
|
|
* Description : Enables or disables ADC conversion complete interrupt request.
|
|
*
|
|
*END**************************************************************************/
|
|
void ADC_SetIntCmd(ADC_Type* base, bool enable)
|
|
{
|
|
uint8_t triggerMode;
|
|
|
|
triggerMode = ADC_GetConvertTrigMode(base);
|
|
if(triggerMode == adcSoftwareTrigger)
|
|
{
|
|
if(enable)
|
|
ADC_HC0_REG(base) |= ADC_HC0_AIEN_MASK;
|
|
else
|
|
ADC_HC0_REG(base) &= ~ADC_HC0_AIEN_MASK;
|
|
}
|
|
else
|
|
{
|
|
if(enable)
|
|
ADC_HC1_REG(base) |= ADC_HC1_AIEN_MASK;
|
|
else
|
|
ADC_HC1_REG(base) &= ~ADC_HC1_AIEN_MASK;
|
|
}
|
|
}
|
|
|
|
/*FUNCTION**********************************************************************
|
|
*
|
|
* Function Name : ADC_IsConvertComplete
|
|
* Description : This function is used to get ADC conversion complete status.
|
|
*
|
|
*END**************************************************************************/
|
|
bool ADC_IsConvertComplete(ADC_Type* base)
|
|
{
|
|
uint8_t triggerMode;
|
|
|
|
triggerMode = ADC_GetConvertTrigMode(base);
|
|
if(triggerMode == adcSoftwareTrigger)
|
|
return (bool)((ADC_HS_REG(base) & ADC_HS_COCO0_MASK) >> ADC_HS_COCO0_SHIFT);
|
|
else
|
|
return (bool)((ADC_HS_REG(base) & ADC_HS_COCO1_MASK) >> ADC_HS_COCO1_SHIFT);
|
|
}
|
|
|
|
/*FUNCTION**********************************************************************
|
|
*
|
|
* Function Name : ADC_SetDmaCmd
|
|
* Description : Enable or disable DMA request.
|
|
*
|
|
*END**************************************************************************/
|
|
void ADC_SetDmaCmd(ADC_Type* base, bool enable)
|
|
{
|
|
if (enable)
|
|
ADC_GC_REG(base) |= ADC_GC_DMAEN_MASK;
|
|
else
|
|
ADC_GC_REG(base) &= ~ADC_GC_DMAEN_MASK;
|
|
}
|
|
|
|
/*******************************************************************************
|
|
* EOF
|
|
******************************************************************************/
|