zephyr/subsys/testsuite/coverage/coverage_ram.ld
Grygorii Strashko 965ca96c77 testsuite: coverage: fix arm64 build with gcov enabled
On ARM64 the build will fail with coverage and GCOV enabled:

  CONFIG_COVERAGE=y
  CONFIG_COVERAGE_GCOV=y
  CONFIG_FORCE_COVERAGE=y

west build -b rpi_5 -p always samples/hello_world -- \
 -DCONFIG_COVERAGE=y -DCONFIG_FORCE_COVERAGE=y

Failure:
 "linker_zephyr_pre0.cmd:181: undefined symbol `__gcov_bss_end' referenced
in expression"

Fix build of ARM64 platforms with coverage and GCOV enabled by adding for
ARM64 the same gcov linker sections as it is done for ARM.

Signed-off-by: Grygorii Strashko <grygorii_strashko@epam.com>
2024-08-13 14:57:50 +02:00

82 lines
1.9 KiB
Text

/*
* Copyright (c) 2019 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/* Copied from linker.ld */
#if defined(CONFIG_ARM) || defined(CONFIG_ARM64)
SECTION_DATA_PROLOGUE(_GCOV_BSS_SECTION_NAME,(NOLOAD),)
{
#ifdef CONFIG_USERSPACE
MPU_ALIGN(__gcov_bss_end - __gcov_bss_start );
#else /* CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT && CONFIG_USERSPACE */
. = ALIGN(_region_min_align);
#endif /* CONFIG_USERSPACE */
__gcov_bss_start = .;
KEEP(*(".bss.__gcov0.*"));
#ifdef CONFIG_USERSPACE
MPU_ALIGN(__gcov_bss_end - __gcov_bss_start );
#else /* CONFIG_USERSPACE */
. = ALIGN(_region_min_align);
#endif /* CONFIG_USERSPACE */
__gcov_bss_end = .;
} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
#endif
#ifdef CONFIG_X86_64
SECTION_PROLOGUE(_GCOV_BSS_SECTION_NAME, (NOLOAD), ALIGN(16))
{
MMU_PAGE_ALIGN
__gcov_bss_start = .;
*(".bss.__gcov0.*");
. = ALIGN(8);
MMU_PAGE_ALIGN
__gcov_bss_end = .;
}GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
#elif CONFIG_X86
SECTION_PROLOGUE(_GCOV_BSS_SECTION_NAME, (NOLOAD),)
{
MMU_PAGE_ALIGN
__gcov_bss_start = .;
*(".bss.__gcov0.*");
. = ALIGN(4);
MMU_PAGE_ALIGN
__gcov_bss_end = .;
} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
#endif
#ifdef CONFIG_ARC
SECTION_PROLOGUE(_GCOV_BSS_SECTION_NAME, (NOLOAD),)
{
MPU_MIN_SIZE_ALIGN
__gcov_bss_start = .;
*(".bss.__gcov0.*");
#ifdef CONFIG_USERSPACE
. = ALIGN(1 << LOG2CEIL(. - __gcov_bss_start));
#else
MPU_MIN_SIZE_ALIGN
#endif
__gcov_bss_end = .;
} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
#endif
#ifdef CONFIG_RISCV
SECTION_PROLOGUE(_GCOV_BSS_SECTION_NAME, (NOLOAD),)
{
MPU_MIN_SIZE_ALIGN
__gcov_bss_start = .;
*(".bss.__gcov0.*");
. = ALIGN(4);
MPU_MIN_SIZE_ALIGN
__gcov_bss_end = .;
} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
#endif
__gcov_bss_num_words = ((__gcov_bss_end - __gcov_bss_start) >> 2);
__gcov_bss_size = __gcov_bss_end - __gcov_bss_start;