8bed2d5e27
By default, after reset SWO signal is not connected to GPIO pin. This commit adds required initialization code to enable support for SWO logger. Not all SoC series support the feature. Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
28 lines
1.5 KiB
C
28 lines
1.5 KiB
C
/* This file is a temporary workaround for mapping of the generated information
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* to the current driver definitions. This will be removed when the drivers
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* are modified to handle the generated information, or the mapping of
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* generated data matches the driver definitions.
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*/
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/* SoC level DTS fixup file */
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define DT_FLASH_DEV_BASE_ADDRESS DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_BASE_ADDRESS
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#define DT_FLASH_DEV_NAME DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_LABEL
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#define DT_GPIO_GECKO_COMMON_NAME DT_SILABS_EFR32XG1_GPIO_4000A400_LABEL
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#define DT_GPIO_GECKO_COMMON_EVEN_IRQ DT_SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_EVEN
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#define DT_GPIO_GECKO_COMMON_EVEN_PRI DT_SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_EVEN_PRIORITY
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#define DT_GPIO_GECKO_COMMON_ODD_IRQ DT_SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_ODD
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#define DT_GPIO_GECKO_COMMON_ODD_PRI DT_SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_ODD_PRIORITY
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#define DT_GPIO_GECKO_SWO_LOCATION DT_SILABS_EFR32XG1_GPIO_4000A400_LOCATION_SWO
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#define DT_GPIO_GECKO_PORTA_NAME DT_SILABS_EFR32XG1_GPIO_PORT_4000A000_LABEL
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#define DT_GPIO_GECKO_PORTB_NAME DT_SILABS_EFR32XG1_GPIO_PORT_4000A030_LABEL
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#define DT_GPIO_GECKO_PORTC_NAME DT_SILABS_EFR32XG1_GPIO_PORT_4000A060_LABEL
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#define DT_GPIO_GECKO_PORTD_NAME DT_SILABS_EFR32XG1_GPIO_PORT_4000A090_LABEL
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#define DT_GPIO_GECKO_PORTE_NAME DT_SILABS_EFR32XG1_GPIO_PORT_4000A0C0_LABEL
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#define DT_GPIO_GECKO_PORTF_NAME DT_SILABS_EFR32XG1_GPIO_PORT_4000A0F0_LABEL
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/* End of SoC Level DTS fixup file */
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