Adds initial support for the kw41z SoC. This is the first SoC in the Kinetis W (wireless connectivity) series added to Zephyr. The kw41z integrates a 2.4 GHz radio transceiver, BLE link layer hardware, and an 802.15.4 packet processor with an ARM Cortex M0+. It has 512 KB flash, 128 KB SRAM, and can run the system clock at up to 48 MHz. This SoC currently has mcux shim drivers for lpuart (serial), gpio, pinmux, i2c, and flash. Jira: ZEP-1389 Change-Id: I8cff6d203867ba3ace7e05c36441dc8f3cbca8d8 Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
121 lines
2.7 KiB
Text
121 lines
2.7 KiB
Text
#
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# Copyright (c) 2016 Intel Corporation
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# Copyright (c) 2016, Freescale Semiconductor, Inc.
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config SOC_FAMILY_KINETIS
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bool
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# omit prompt to signify a "hidden" option
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default n
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if SOC_FAMILY_KINETIS
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config SOC_FAMILY
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string
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default "nxp_kinetis"
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endif
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source "arch/arm/soc/nxp_kinetis/*/Kconfig.soc"
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config SOC_PART_NUMBER
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string
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default SOC_PART_NUMBER_KINETIS_K6X if SOC_SERIES_KINETIS_K6X
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default SOC_PART_NUMBER_KINETIS_KWX if SOC_SERIES_KINETIS_KWX
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help
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This string holds the full part number of the SoC. It is a hidden option
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that you should not set directly. The part number selection choice defines
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the default value for this string.
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config HAS_OSC
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bool
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default n
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help
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Set if the oscillator (OSC) module is present in the SoC.
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config HAS_MCG
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bool
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default n
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help
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Set if the multipurpose clock generator (MCG) module is present in the SoC.
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config HAS_RNGA
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bool
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default n
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help
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Set if the random number generator accelerator (RNGA) module is present in the SoC.
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config HAS_LPUART
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bool
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default n
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help
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Set if the low power uart (LPUART) module is present in the SoC.
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if HAS_OSC
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choice
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prompt "Oscillator Mode Selection"
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default OSC_EXTERNAL
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config OSC_EXTERNAL
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bool "External reference clock"
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help
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Set this option to use the oscillator in external reference clock mode.
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config OSC_LOW_POWER
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bool "Low power oscillator"
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help
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Set this option to use the oscillator in low-power mode.
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config OSC_HIGH_GAIN
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bool "High gain oscillator"
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help
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Set this option to use the oscillator in high-gain mode.
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endchoice
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config OSC_XTAL0_FREQ
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int "External oscillator frequency"
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help
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Set the external oscillator frequency in Hz. This should be set by the
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board's defconfig.
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endif # HAS_OSC
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if HAS_MCG
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config MCG_PRDIV0
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hex "PLL external reference divider"
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range 0 0x18
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default 0
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help
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Selects the amount to divide down the external reference clock for the PLL.
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The resulting frequency must be in the range of 2 MHz to 4 MHz.
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config MCG_VDIV0
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hex "VCO 0 divider"
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range 0 0x1F
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default 0
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help
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Selects the amount to divide the VCO output of the PLL. The VDIV 0 bits
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establish the multiplication factor (M) applied to the reference clock
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frequency.
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config MCG_FCRDIV
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int "Fast internal reference clock divider"
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range 0 7
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default 1
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help
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Selects the amount to divide down the fast internal reference clock. The
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resulting frequency must be in the range 31.25 kHz to 4 MHz.
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config MCG_FRDIV
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int "FLL external reference divider"
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range 0 7
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default 0
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help
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Selects the amount to divide down the external reference clock for the
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FLL. The resulting frequency must be in the range 31.25 kHz to 39.0625
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kHz.
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endif # HAS_MCG
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