7bd697b0d5
The technical manuals and example HAL code frequently refer to register bank numbers from some base address. Add these helper functions to read and write registers correctly using this notation. Change-Id: Ia082f5cc89081fcea2cb6ad8204c1b9b2650d3fd Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
112 lines
3 KiB
C
112 lines
3 KiB
C
/*
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* Copyright (c) 2016 Intel Corporation
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief Nios II specific nanokernel interface header
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* This header contains the Nios II specific nanokernel interface. It is
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* included by the generic nanokernel interface header (nanokernel.h)
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*/
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#ifndef _ARCH_IFACE_H
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#define _ARCH_IFACE_H
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#include <system.h>
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#include <arch/nios2/asm_inline.h>
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#include "nios2.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define STACK_ALIGN 4
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#define _NANO_ERR_HW_EXCEPTION (0) /* MPU/Bus/Usage fault */
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#define _NANO_ERR_INVALID_TASK_EXIT (1) /* Invalid task exit */
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#define _NANO_ERR_STACK_CHK_FAIL (2) /* Stack corruption detected */
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#define _NANO_ERR_ALLOCATION_FAIL (3) /* Kernel Allocation Failure */
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#ifndef _ASMLANGUAGE
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#include <stdint.h>
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#include <irq.h>
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/* STUB. Eventually port ARC/ARM interrupt stuff */
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#define _ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p)
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static ALWAYS_INLINE unsigned int _arch_irq_lock(void)
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{
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unsigned int key;
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key = _nios2_creg_read(NIOS2_CR_STATUS);
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_nios2_creg_write(NIOS2_CR_STATUS, key & ~NIOS2_STATUS_PIE_MSK);
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return key;
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}
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static ALWAYS_INLINE void _arch_irq_unlock(unsigned int key)
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{
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/* If the CPU is built without certain features, then
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* the only writable bit in the status register is PIE
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* in which case we can just write the value stored in key,
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* all the other writable bits will be the same.
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*
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* If not, other stuff could have changed and we need to
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* specifically flip just that bit.
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*/
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#if (NIOS2_NUM_OF_SHADOW_REG_SETS > 0) || \
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(defined NIOS2_EIC_PRESENT) || \
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(defined NIOS2_MMU_PRESENT) || \
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(defined NIOS2_MPU_PRESENT)
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uint32_t status_reg;
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/* Interrupts were already locked when irq_lock() was called,
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* so don't do anything
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*/
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if (!(key & NIOS2_STATUS_PIE_MSK))
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return;
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status_reg = _nios2_creg_read(NIOS2_CR_STATUS);
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_nios2_creg_write(NIOS2_CR_STATUS, status_reg | NIOS2_STATUS_PIE_MSK);
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#else
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_nios2_creg_write(NIOS2_CR_STATUS, key);
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#endif
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}
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int _arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
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void (*routine)(void *parameter), void *parameter,
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uint32_t flags);
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void _arch_irq_enable(unsigned int irq);
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void _arch_irq_disable(unsigned int irq);
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struct __esf {
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/* XXX - not defined yet */
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uint32_t placeholder;
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};
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typedef struct __esf NANO_ESF;
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extern const NANO_ESF _default_esf;
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FUNC_NORETURN void _SysFatalErrorHandler(unsigned int reason,
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const NANO_ESF *esf);
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif
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