76ced4a82d
Add the property of drive-strength to drive a high or low current
selection. If this property is not configured, it is the default
setting. According to the SPEC, the default drive current selection
varies from different pins.
Define the high level 0b: 8mA
low level 1b: 4mA or 2mA
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
194 lines
6.6 KiB
C
194 lines
6.6 KiB
C
/*
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* Copyright (c) 2022 ITE Technology Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_SOC_RISCV_ITE_IT8XXX2_COMMON_PINCTRL_SOC_H_
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#define ZEPHYR_SOC_RISCV_ITE_IT8XXX2_COMMON_PINCTRL_SOC_H_
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#include <zephyr/devicetree.h>
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#include <zephyr/dt-bindings/pinctrl/it8xxx2-pinctrl.h>
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#include <zephyr/types.h>
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/**
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* @brief ITE IT8XXX2 pin type.
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*/
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struct pinctrl_soc_pin {
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/* Pinmux control group */
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const struct device *pinctrls;
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/*
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* Pin configuration
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* kSI[7:0] and KSO[15:0] pins only support pull-up, push-pull/open-drain.
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* GPIO group pinctrl pins (include KSO[17:16]) support impedance,
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* pull-up/down, voltage selection, input.
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*/
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uint32_t pincfg;
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/* GPIO pin */
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uint8_t pin;
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/* Alternate function */
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uint8_t alt_func;
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};
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typedef struct pinctrl_soc_pin pinctrl_soc_pin_t;
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/**
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* @brief PIN configuration bitfield.
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*
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* Pin configuration is coded with the following
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* bit fields.
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* Pin impedance config [ 0 ]
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* Pin pull-up/down config [ 4 : 5 ]
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* Pin voltage selection [ 8 ]
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* Pin input enable config [ 12 ]
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* Pin push-pull/open-drain [ 16 ]
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* Pin drive current high/low[ 20 ]
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* Pin drive current default [ 21 ]
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*/
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#define IT8XXX2_HIGH_IMPEDANCE 0x1U
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#define IT8XXX2_PULL_PIN_DEFAULT 0x0U
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#define IT8XXX2_PULL_UP 0x1U
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#define IT8XXX2_PULL_DOWN 0x2U
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#define IT8XXX2_VOLTAGE_3V3 0x0U
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#define IT8XXX2_VOLTAGE_1V8 0x1U
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#define IT8XXX2_INPUT_ENABLE 0x1U
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#define IT8XXX2_PUSH_PULL 0x0U
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#define IT8XXX2_OPEN_DRAIN 0x1U
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#define IT8XXX2_DRIVE_STRENGTH 0x1U
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#define IT8XXX2_DRIVE_DEFAULT 0x2U
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/* Pin tri-state mode. */
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#define IT8XXX2_IMPEDANCE_SHIFT 0U
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#define IT8XXX2_IMPEDANCE_MASK 0x1U
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/* Pin pull-up or pull-down */
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#define IT8XXX2_PUPDR_SHIFT 4U
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#define IT8XXX2_PUPDR_MASK 0x3U
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#define IT8XXX2_PULL_UP_MASK BIT_MASK(1)
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/* Pin 3.3V or 1.8V */
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#define IT8XXX2_VOLTAGE_SHIFT 8U
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#define IT8XXX2_VOLTAGE_MASK 0x1U
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/* Pin INPUT enable or disable */
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#define IT8XXX2_INPUT_SHIFT 12U
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#define IT8XXX2_INPUT_MASK 0x1U
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/* Pin push-pull/open-drain mode */
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#define IT8XXX2_PP_OD_SHIFT 16U
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#define IT8XXX2_PP_OD_MASK BIT_MASK(1)
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/* Pin driving select control */
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#define IT8XXX2_PDSCX_SHIFT 20U
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#define IT8XXX2_PDSCX_MASK BIT_MASK(2)
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/**
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* @brief Utility macro to obtain configuration of tri-state.
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*/
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#define IT8XXX2_DT_PINCFG_IMPEDANCE(__mode) \
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(((__mode) >> IT8XXX2_IMPEDANCE_SHIFT) & IT8XXX2_IMPEDANCE_MASK)
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/**
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* @brief Utility macro to obtain configuration of pull-up or pull-down.
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*/
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#define IT8XXX2_DT_PINCFG_PUPDR(__mode) \
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(((__mode) >> IT8XXX2_PUPDR_SHIFT) & IT8XXX2_PUPDR_MASK)
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/**
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* @brief Utility macro to obtain input voltage selection.
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*/
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#define IT8XXX2_DT_PINCFG_VOLTAGE(__mode) \
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(((__mode) >> IT8XXX2_VOLTAGE_SHIFT) & IT8XXX2_VOLTAGE_MASK)
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/**
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* @brief Utility macro to obtain input enable.
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*/
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#define IT8XXX2_DT_PINCFG_INPUT(__mode) \
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(((__mode) >> IT8XXX2_INPUT_SHIFT) & IT8XXX2_INPUT_MASK)
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/**
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* @brief Utility macro to obtain configuration of pull-up or not.
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*/
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#define IT8XXX2_DT_PINCFG_PULLUP(__mode) \
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(((__mode) >> IT8XXX2_PUPDR_SHIFT) & IT8XXX2_PULL_UP_MASK)
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/**
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* @brief Utility macro to obtain configuration of push-pull/open-drain mode.
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*/
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#define IT8XXX2_DT_PINCFG_PP_OD(__mode) \
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(((__mode) >> IT8XXX2_PP_OD_SHIFT) & IT8XXX2_PP_OD_MASK)
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/**
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* @brief Utility macro to obtain configuration of driving current selection.
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*/
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#define IT8XXX2_DT_PINCFG_DRIVE_CURRENT(__mode) \
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(((__mode) >> IT8XXX2_PDSCX_SHIFT) & IT8XXX2_PDSCX_MASK)
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/**
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* @brief Utility macro to initialize pincfg field in #pinctrl_pin_t.
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*
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* @param node_id Node identifier.
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*/
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#define Z_PINCTRL_IT8XXX2_PINCFG_INIT(node_id) \
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(((IT8XXX2_HIGH_IMPEDANCE * DT_PROP(node_id, bias_high_impedance)) \
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<< IT8XXX2_IMPEDANCE_SHIFT) | \
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((IT8XXX2_PULL_PIN_DEFAULT * DT_PROP(node_id, bias_pull_pin_default)) \
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<< IT8XXX2_PUPDR_SHIFT) | \
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((IT8XXX2_PULL_UP * DT_PROP(node_id, bias_pull_up)) \
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<< IT8XXX2_PUPDR_SHIFT) | \
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((IT8XXX2_PULL_DOWN * DT_PROP(node_id, bias_pull_down)) \
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<< IT8XXX2_PUPDR_SHIFT) | \
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((IT8XXX2_VOLTAGE_1V8 * DT_ENUM_IDX(node_id, gpio_voltage)) \
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<< IT8XXX2_VOLTAGE_SHIFT) | \
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((IT8XXX2_INPUT_ENABLE * DT_PROP(node_id, input_enable)) \
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<< IT8XXX2_INPUT_SHIFT) | \
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((IT8XXX2_OPEN_DRAIN * DT_PROP(node_id, drive_open_drain)) \
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<< IT8XXX2_PP_OD_SHIFT) | \
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((IT8XXX2_DRIVE_STRENGTH * \
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DT_ENUM_IDX_OR(node_id, drive_strength, IT8XXX2_DRIVE_DEFAULT)) \
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<< IT8XXX2_PDSCX_SHIFT))
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/**
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* @brief Utility macro to initialize pinctrls of pinmuxs field in #pinctrl_pin_t.
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*
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* @param node_id Node identifier.
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*/
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#define Z_PINCTRL_IT8XXX2_PINCTRL_INIT(node_id) \
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DEVICE_DT_GET(DT_PHANDLE(node_id, pinmuxs))
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/**
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* @brief Utility macro to initialize pin of pinmuxs field in #pinctrl_pin_t.
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*
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* @param node_id Node identifier.
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*/
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#define Z_PINCTRL_IT8XXX2_PIN_INIT(node_id) \
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DT_PHA(node_id, pinmuxs, pin)
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/**
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* @brief Utility macro to initialize alt_func of pinmuxs field in #pinctrl_pin_t.
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*
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* @param node_id Node identifier.
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*/
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#define Z_PINCTRL_IT8XXX2_ALT_INIT(node_id) \
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DT_PHA(node_id, pinmuxs, alt_func)
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/**
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* @brief Utility macro to initialize each pin.
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*
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* @param node_id Node identifier.
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* @param prop Property name.
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* @param idx Property entry index.
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*/
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx) \
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{ .pinctrls = Z_PINCTRL_IT8XXX2_PINCTRL_INIT( \
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DT_PROP_BY_IDX(node_id, prop, idx)), \
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.pincfg = Z_PINCTRL_IT8XXX2_PINCFG_INIT( \
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DT_PROP_BY_IDX(node_id, prop, idx)), \
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.pin = Z_PINCTRL_IT8XXX2_PIN_INIT( \
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DT_PROP_BY_IDX(node_id, prop, idx)), \
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.alt_func = Z_PINCTRL_IT8XXX2_ALT_INIT( \
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DT_PROP_BY_IDX(node_id, prop, idx)), },
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/**
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* @brief Utility macro to initialize state pins contained in a given property.
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*
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* @param node_id Node identifier.
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* @param prop Property name describing state pins.
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*/
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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{DT_FOREACH_PROP_ELEM(node_id, prop, Z_PINCTRL_STATE_PIN_INIT)}
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#endif /* ZEPHYR_SOC_RISCV_ITE_IT8XXX2_COMMON_PINCTRL_SOC_H_ */
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