76aa4f07d6
Add support for the RPU, real-time processing unit on Versal NET SoC. It is based on Cortext-R52 processor. The patch contains initial wiring and configuration for generic board with OCM(1MB) and DDR(2G) memories, cpu, interrupt controller, global timer and UART. versalnet.dtsi contains common peripherals integrated into Versal NET SoC, and versalnet_r52.dtsi has peripherals which are private to Cortex-R52 processor. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com> Signed-off-by: Mubin Sayyed <mubin.sayyed@amd.com>
39 lines
1 KiB
C
39 lines
1 KiB
C
/*
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* Copyright (c) 2025 Advanced Micro Devices, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/linker/linker-defs.h>
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#include <zephyr/arch/arm/mpu/arm_mpu.h>
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#define DEVICE_REGION_START 0xE2000000U
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#define DEVICE_REGION_END 0xF8000000U
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static const struct arm_mpu_region mpu_regions[] = {
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MPU_REGION_ENTRY("vector",
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(uintptr_t)_vector_start,
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REGION_RAM_TEXT_ATTR((uintptr_t)_vector_end)),
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MPU_REGION_ENTRY("SRAM_TEXT",
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(uintptr_t)__text_region_start,
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REGION_RAM_TEXT_ATTR((uintptr_t)__rodata_region_start)),
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MPU_REGION_ENTRY("SRAM_RODATA",
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(uintptr_t)__rodata_region_start,
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REGION_RAM_RO_ATTR((uintptr_t)__rodata_region_end)),
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MPU_REGION_ENTRY("SRAM_DATA",
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(uintptr_t)__rom_region_end,
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REGION_RAM_ATTR((uintptr_t)__kernel_ram_end)),
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MPU_REGION_ENTRY("DEVICE",
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DEVICE_REGION_START,
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REGION_DEVICE_ATTR(DEVICE_REGION_END)),
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};
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const struct arm_mpu_config mpu_config = {
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.num_regions = ARRAY_SIZE(mpu_regions),
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.mpu_regions = mpu_regions,
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};
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