760210f39d
Separate the current driver for the FPGA iCE40 into two different ones. One implements only the SPI load mode, the other one only the GPIO bitbang mode. Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
123 lines
2.4 KiB
C
123 lines
2.4 KiB
C
/*
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* Copyright (c) 2022 Meta
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* Copyright (c) 2024 SILA Embedded Solutions GmbH
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/logging/log.h>
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#include "fpga_ice40_common.h"
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LOG_MODULE_REGISTER(fpga_ice40);
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void fpga_ice40_crc_to_str(uint32_t crc, char *s)
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{
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char ch;
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uint8_t i;
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uint8_t nibble;
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const char *table = "0123456789abcdef";
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for (i = 0; i < sizeof(crc) * NIBBLES_PER_BYTE; ++i, crc >>= BITS_PER_NIBBLE) {
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nibble = crc & GENMASK(BITS_PER_NIBBLE, 0);
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ch = table[nibble];
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s[sizeof(crc) * NIBBLES_PER_BYTE - i - 1] = ch;
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}
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s[sizeof(crc) * NIBBLES_PER_BYTE] = '\0';
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}
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enum FPGA_status fpga_ice40_get_status(const struct device *dev)
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{
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enum FPGA_status st;
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k_spinlock_key_t key;
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struct fpga_ice40_data *data = dev->data;
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key = k_spin_lock(&data->lock);
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if (data->loaded && data->on) {
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st = FPGA_STATUS_ACTIVE;
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} else {
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st = FPGA_STATUS_INACTIVE;
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}
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k_spin_unlock(&data->lock, key);
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return st;
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}
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static int fpga_ice40_on_off(const struct device *dev, bool on)
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{
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int ret;
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k_spinlock_key_t key;
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struct fpga_ice40_data *data = dev->data;
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const struct fpga_ice40_config *config = dev->config;
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key = k_spin_lock(&data->lock);
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ret = gpio_pin_configure_dt(&config->creset, on ? GPIO_OUTPUT_HIGH : GPIO_OUTPUT_LOW);
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if (ret < 0) {
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goto unlock;
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}
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data->on = on;
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ret = 0;
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unlock:
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k_spin_unlock(&data->lock, key);
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return ret;
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}
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int fpga_ice40_on(const struct device *dev)
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{
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return fpga_ice40_on_off(dev, true);
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}
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int fpga_ice40_off(const struct device *dev)
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{
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return fpga_ice40_on_off(dev, false);
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}
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int fpga_ice40_reset(const struct device *dev)
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{
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return fpga_ice40_off(dev) || fpga_ice40_on(dev);
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}
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const char *fpga_ice40_get_info(const struct device *dev)
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{
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struct fpga_ice40_data *data = dev->data;
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return data->info;
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}
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int fpga_ice40_init(const struct device *dev)
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{
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int ret;
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const struct fpga_ice40_config *config = dev->config;
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if (!device_is_ready(config->creset.port)) {
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LOG_ERR("%s: GPIO for creset is not ready", dev->name);
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return -ENODEV;
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}
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if (!device_is_ready(config->cdone.port)) {
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LOG_ERR("%s: GPIO for cdone is not ready", dev->name);
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return -ENODEV;
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}
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ret = gpio_pin_configure_dt(&config->creset, GPIO_OUTPUT_HIGH);
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if (ret < 0) {
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LOG_ERR("failed to configure CRESET: %d", ret);
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return ret;
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}
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ret = gpio_pin_configure_dt(&config->cdone, GPIO_INPUT);
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if (ret < 0) {
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LOG_ERR("Failed to initialize CDONE: %d", ret);
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return ret;
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}
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return 0;
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}
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