Daniel Leung 307708c450 xtensa: sample_controller: smaller intermediate build artifacts ... For some weird reasons, if the sections in linker script are not in memory address order, there are lots of padding involved in zephyr_pre0.elf. This moves the .intList section to its memory ordered location. When building hello_world, this shrinks zephyr_pre0.elf from 512MB to 339KB. Signed-off-by: Daniel Leung <daniel.leung@intel.com>		2023-08-22 10:00:46 +02:00
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include	xtensa: sample_controller: smaller intermediate build artifacts	2023-08-22 10:00:46 +02:00
CMakeLists.txt	license: cleanup: add SPDX Apache-2.0 license identifier	2019-04-07 08:45:22 -04:00
Kconfig.defconfig	soc: xtensa: sample_controller: Cleanup backend config	2022-03-14 14:08:49 -04:00
Kconfig.soc	debug: coredump: add xtensa coredump	2021-12-14 07:40:55 -05:00
linker.ld	soc/xtensa/sample_controller: Expose linker script on include	2022-11-03 10:25:07 +01:00