In j722s_main.dtsi, the pinctrl block must have reg length 0x2b0 As per TRM, PADCONFIG registers range from 0 to 171. Thus, length = (171-0+1)*4 = 172*4 = 0x2b0. Reference: https://www.ti.com/lit/ds/symlink/tda4ven-q1.pdf Table 5.1 contains data on PADCONFIG registers. Signed-off-by: Shreyas Shankar <s-shankar@ti.com>
109 lines
2.4 KiB
Text
109 lines
2.4 KiB
Text
/*
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* Copyright (c) 2024 Texas Instruments Incorporated
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* Andrew Davis <afd@ti.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <freq.h>
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#include <zephyr/dt-bindings/interrupt-controller/ti-vim.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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pinctrl: pinctrl@f4000 {
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compatible = "ti,k3-pinctrl";
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reg = <0x000f4000 0x2b0>;
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status = "okay";
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};
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gpio0: gpio@600000 {
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compatible = "ti,davinci-gpio";
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reg = <0x00600000 0x100>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <92>;
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status = "disabled";
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};
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gpio1: gpio@601000 {
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compatible = "ti,davinci-gpio";
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reg = <0x00601000 0x100>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <52>;
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status = "disabled";
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};
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uart0: uart@2800000 {
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compatible = "ns16550";
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reg = <0x02800000 0x100>;
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clock-frequency = <48000000>;
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interrupts = <0 210 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-parent = <&vim>;
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reg-shift = <2>;
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status = "disabled";
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};
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uart1: uart@2810000 {
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compatible = "ns16550";
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reg = <0x02810000 0x100>;
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clock-frequency = <48000000>;
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interrupts = <0 211 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-parent = <&vim>;
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reg-shift = <2>;
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status = "disabled";
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};
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uart2: uart@2820000 {
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compatible = "ns16550";
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reg = <0x02820000 0x100>;
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clock-frequency = <48000000>;
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interrupts = <0 212 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-parent = <&vim>;
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reg-shift = <2>;
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status = "disabled";
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};
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uart3: uart@2830000 {
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compatible = "ns16550";
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reg = <0x02830000 0x100>;
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clock-frequency = <48000000>;
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interrupts = <0 213 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-parent = <&vim>;
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reg-shift = <2>;
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status = "disabled";
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};
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uart4: uart@2840000 {
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compatible = "ns16550";
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reg = <0x02840000 0x100>;
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clock-frequency = <48000000>;
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interrupts = <0 214 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-parent = <&vim>;
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reg-shift = <2>;
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status = "disabled";
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};
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uart5: uart@2850000 {
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compatible = "ns16550";
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reg = <0x02850000 0x100>;
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clock-frequency = <48000000>;
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interrupts = <0 215 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-parent = <&vim>;
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reg-shift = <2>;
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status = "disabled";
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};
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uart6: uart@2860000 {
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compatible = "ns16550";
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reg = <0x02860000 0x100>;
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clock-frequency = <48000000>;
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interrupts = <0 216 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-parent = <&vim>;
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reg-shift = <2>;
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status = "disabled";
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};
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};
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