We re-wrote the xtensa arch code, but never got around to purging the old implementation. Removed those boards which hadn't been moved to the new arch code. These were all xt-sim simulator targets and not real hardware. Fixes: #18138 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
18 lines
244 B
Text
18 lines
244 B
Text
# Kconfig - ESP32 board configuration
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#
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# Copyright (c) 2017 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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if SOC_ESP32
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config SOC
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string
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default "esp32"
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config IRQ_OFFLOAD_INTNUM
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default 7
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config MP_NUM_CPUS
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default 2
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endif
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