6ce337a7d7
Remove usart2_pins_b as this configuration is not possible (PA15 could not be mapped on USART2). Besides usart2_pins_c as this configuration is not used yet, remove to reserve "usart2_pins_c" for future use Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
50 lines
1.4 KiB
Text
50 lines
1.4 KiB
Text
/*
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* Copyright (c) 2017 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/stm32-pinctrl.h>
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/ {
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soc {
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pinctrl: pin-controller {
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usart1_pins_a: usart1@0 {
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rx_tx {
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rx = <STM32_PIN_PB7 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PB6 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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usart1_pins_b: usart1@1 {
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rx_tx {
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rx = <STM32_PIN_PA10 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PA9 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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usart1_pins_c: usart1@2 {
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rx_tx {
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rx = <STM32_PIN_PG10 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PB6 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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usart2_pins_a: usart2@0 {
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rx_tx {
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rx = <STM32_PIN_PA3 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PA2 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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usart3_pins_a: usart3@0 {
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rx_tx {
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rx = <STM32_PIN_PB11 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PB10 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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usart3_pins_b: usart3@1 {
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rx_tx {
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rx = <STM32_PIN_PD9 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PD8 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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};
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};
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};
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