6b3749d2ff
Add driver implementation and header files for a MEC172x aggregated interrupt driver. Enable the parent(ECIA) node to have the driver initialize interrupt hardware for use. Enable child nodes for those GIRQs used for aggregation. Refer to chip documention for the list of GIRQs restricted to aggregation and those which support direct mode. Add chip level device tree node for MEC172x EC interrupt aggregator parent and GIRQ children. Each child node contains a list of sources representing the source bit position in the GIRQ registers. Add DT bindings for ECIA and GIRQ nodes. Add build file(s) and configuration items for the MEC172x ECIA aggregated interrupt driver. Add and enable the MEC172x interrupt driver on the MEC172x evaluation board(EVB). Enable parent node to initialize ECIA hardware. Child nodes are left disabled until a future driver needs them. Signed-off-by: Scott Worley <scott.worley@microchip.com>
144 lines
4.2 KiB
C
144 lines
4.2 KiB
C
/*
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* Copyright (c) 2021 Microchip Technology Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @brief Driver for External interrupt controller in Microchip XEC devices
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*
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* Based on reference manuals:
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* Reference Manuals for MEC152x and MEC172x ARM(r) 32-bit MCUs
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*
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* Chapter: EC Interrupt Aggregator (ECIA)
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*
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*/
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#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_MCHP_XEC_ECIA_H_
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#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_MCHP_XEC_ECIA_H_
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#include <device.h>
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#include <irq.h>
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/**
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* @brief enable GIRQn interrupt for specific source
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*
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* @param girq_id is the GIRQ number (8 - 26)
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* @param src is the interrupt source in the GIRQ (0 - 31)
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*/
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int mchp_xec_ecia_enable(int girq_id, int src);
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/**
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* @brief disable EXTI interrupt for specific line
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*
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* @param girq_id is the GIRQ number (8 - 26)
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* @param src is the interrupt source in the GIRQ (0 - 31)
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*/
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int mchp_xec_ecia_disable(int girq_id, int src);
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/* callback for ECIA GIRQ interrupt source */
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typedef void (*mchp_xec_ecia_callback_t) (int girq_id, int src, void *user);
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/**
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* @brief set GIRQn interrupt source callback
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*
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* @param girq_id is the GIRQ number (8 - 26)
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* @param src is the interrupt source in the GIRQ (0 - 31)
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* @param cb user callback
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* @param data user data
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*/
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int mchp_xec_ecia_set_callback(int girq_id, int src,
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mchp_xec_ecia_callback_t cb, void *data);
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/**
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* @brief set GIRQn interrupt source callback
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*
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* @param dev_girq is a handle to the GIRQn device
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* @param src is the interrupt source in the GIRQ (0 - 31)
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* @param cb user callback
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* @param data user data
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*/
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int mchp_xec_ecia_set_callback_by_dev(const struct device *dev_girq, int src,
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mchp_xec_ecia_callback_t cb, void *data);
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/**
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* @brief unset GIRQn interrupt source callback
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*
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* @param girq_id is the GIRQ number (8 - 26)
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* @param src is the interrupt source in the GIRQ (0 - 31)
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*/
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int mchp_ecia_unset_callback(int girq_id, int src);
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/**
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* @brief unset GIRQn interrupt source callback
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*
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* @param dev_girq is a handle to the GIRQn device
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* @param src is the interrupt source in the GIRQ (0 - 31)
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*/
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int mchp_ecia_unset_callback_by_dev(const struct device *dev_girq, int src);
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/* platform specific */
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/** @brief enable or disable aggregated GIRQ output
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*
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* @param girq_id is the GIRQ number (8 - 26)
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* @param enable non-zero enables aggregated output else disables
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*/
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void mchp_xec_ecia_girq_aggr_en(uint8_t girq_id, uint8_t enable);
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/** @brief clear GIRQ latched source status bit
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*
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* @param girq_id is the GIRQ number (8 - 26)
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* @param src_bit is the source bit position in the GIRQ registers (0 - 31)
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*/
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void mchp_xec_ecia_girq_src_clr(uint8_t girq_id, uint8_t src_bit);
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/** @brief enable a source in a GIRQ
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*
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* @param girq_id is the GIRQ number (8 - 26)
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* @param src_bit is the source bit position in the GIRQ registers (0 - 31)
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*/
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void mchp_xec_ecia_girq_src_en(uint8_t girq_id, uint8_t src_bit);
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/** @brief disable a source in a GIRQ
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*
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* @param girq_id is the GIRQ number (8 - 26)
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* @param src_bit is the source bit position in the GIRQ registers (0 - 31)
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*/
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void mchp_xec_ecia_girq_src_dis(uint8_t girq_id, uint8_t src_bit);
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/** @brief clear GIRQ latches sources specified in bitmap
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*
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* @param girq_id is the GIRQ number (8 - 26)
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* @param bitmap contains the source bits to clear
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*/
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void mchp_xec_ecia_girq_src_clr_bitmap(uint8_t girq_id, uint32_t bitmap);
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/** @brief enable sources in a GIRQ
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*
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* @param girq_id is the GIRQ number (8 - 26)
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* @param bitmap contains the source bits to enable
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*/
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void mchp_xec_ecia_girq_src_en_bitmap(uint8_t girq_id, uint32_t bitmap);
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/** @brief disable sources in a GIRQ
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*
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* @param girq_id is the GIRQ number (8 - 26)
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* @param bitmap contains the source bits to disable
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*/
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void mchp_xec_ecia_girq_src_dis_bitmap(uint8_t girq_id, uint32_t bitmap);
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/** @brief Read GIRQ result register (bit-wise OR of enable and source)
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*
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* @param girq_id is the GIRQ number (8 - 26)
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* @return 32-bit unsigned result register value
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*/
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uint32_t mchp_xec_ecia_girq_result(uint8_t girq_id);
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/** @brief Clear external NVIC input pending status
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*
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* @param nvic_num is 0 to maximum NVIC inputs for the chip.
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*/
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void mchp_xec_ecia_nvic_clr_pend(uint32_t nvic_num);
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#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_MCHP_XEC_ECIA_H_ */
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