29f87c3a0f
Disable RTC WDT enabled (by default) by 2nd stage bootloader in ESP-IDF. This WDT timer ensures correct hand-over and startup sequence from bootloader to application. Enabling bootloader caused system clock initialization to fail when clock rate is greater then 80MHz. This also fixes esp32 clock source code. Signed-off-by: Mahavir Jain <mahavir@espressif.com>
18 lines
333 B
Text
18 lines
333 B
Text
# Copyright (c) 2017 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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config SOC_ESP32
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bool "ESP32"
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select XTENSA
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select CLOCK_CONTROL
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select CLOCK_CONTROL_ESP32
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config IDF_TARGET_ESP32
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bool "ESP32 as target board"
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default y
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depends on SOC_ESP32
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config ESPTOOLPY_FLASHFREQ_80M
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bool
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default y
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depends on SOC_ESP32
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