6486c429f1
Add device tree elements for all gpio ports of the efr32mg12p including the dts fixup entries. Also remove gpio port e since this is not available in efr32mg12p socs. Signed-off-by: Christian Taedcke <hacking@taedcke.com>
33 lines
1.8 KiB
C
33 lines
1.8 KiB
C
/* SPDX-License-Identifier: Apache-2.0 */
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/* This file is a temporary workaround for mapping of the generated information
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* to the current driver definitions. This will be removed when the drivers
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* are modified to handle the generated information, or the mapping of
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* generated data matches the driver definitions.
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*/
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/* SoC level DTS fixup file */
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define DT_CPU_CLOCK_FREQUENCY DT_ARM_CORTEX_M4F_0_CLOCK_FREQUENCY
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#define DT_FLASH_DEV_BASE_ADDRESS DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_BASE_ADDRESS
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#define DT_FLASH_DEV_NAME DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_LABEL
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#define DT_GPIO_GECKO_COMMON_NAME DT_SILABS_EFR32MG_GPIO_4000A400_LABEL
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#define DT_GPIO_GECKO_COMMON_EVEN_IRQ DT_SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_EVEN
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#define DT_GPIO_GECKO_COMMON_EVEN_PRI DT_SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_EVEN_PRIORITY
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#define DT_GPIO_GECKO_COMMON_ODD_IRQ DT_SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_ODD
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#define DT_GPIO_GECKO_COMMON_ODD_PRI DT_SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_ODD_PRIORITY
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#define DT_GPIO_GECKO_SWO_LOCATION DT_SILABS_EFR32MG_GPIO_4000A400_LOCATION_SWO
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#define DT_GPIO_GECKO_PORTA_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A000_LABEL
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#define DT_GPIO_GECKO_PORTB_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A030_LABEL
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#define DT_GPIO_GECKO_PORTC_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A060_LABEL
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#define DT_GPIO_GECKO_PORTD_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A090_LABEL
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#define DT_GPIO_GECKO_PORTF_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A0F0_LABEL
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#define DT_GPIO_GECKO_PORTI_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A180_LABEL
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#define DT_GPIO_GECKO_PORTJ_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A1B0_LABEL
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#define DT_GPIO_GECKO_PORTK_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A1E0_LABEL
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/* End of SoC Level DTS fixup file */
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