6298b27725
Now that watchdog drivers are enabled based on devicetree we need to remove any cases of them getting enabled by Kconfig.defconfig* files as this can lead to errors. Typically the Kconfig.defconfig* will blindly enable a watchdog and not respect the devicetree state of the watchdog. Additionally we can get problems with prj.conf/defconfig getting incorrectly overridden. Signed-off-by: Kumar Gala <galak@kernel.org>
198 lines
4.3 KiB
Text
198 lines
4.3 KiB
Text
# i.MX RT series
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# Copyright (c) 2017-2021, NXP
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# SPDX-License-Identifier: Apache-2.0
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if SOC_SERIES_IMX_RT
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config SOC_SERIES
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default "rt"
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config ROM_START_OFFSET
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default 0x400 if BOOTLOADER_MCUBOOT
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default 0x2000 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR
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config CAN_MCUX_FLEXCAN
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default y if HAS_MCUX_FLEXCAN
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depends on CAN
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config DISPLAY_MCUX_ELCDIF
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default y if HAS_MCUX_ELCDIF
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depends on DISPLAY
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config PINCTRL_IMX
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default y if HAS_MCUX_IOMUXC
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depends on PINCTRL
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config ENTROPY_MCUX_TRNG
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default y if HAS_MCUX_TRNG
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depends on ENTROPY_GENERATOR
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config ADC_MCUX_12B1MSPS_SAR
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default y if HAS_MCUX_12B1MSPS_SAR
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depends on ADC
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config ETH_MCUX
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default y if HAS_MCUX_ENET
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depends on NET_L2_ETHERNET
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config IMX_USDHC
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default y if (HAS_MCUX_USDHC1 || HAS_MCUX_USDHC2)
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depends on SDHC
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config LOG_BACKEND_SWO_FREQ_HZ
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default 7500000
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depends on LOG_BACKEND_SWO
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if FLASH_MCUX_FLEXSPI_XIP
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# Avoid RWW hazards by defaulting logging to disabled
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choice FLASH_LOG_LEVEL_CHOICE
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default FLASH_LOG_LEVEL_OFF
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endchoice
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choice MEMC_LOG_LEVEL_CHOICE
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default MEMC_LOG_LEVEL_OFF
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endchoice
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endif
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# set the tick per sec as a divider of the GPT clock source
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config SYS_CLOCK_TICKS_PER_SEC
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default 4096 if MCUX_GPT_TIMER
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 32768 if MCUX_GPT_TIMER
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if COUNTER
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config COUNTER_MCUX_GPT
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default y if HAS_MCUX_GPT
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endif # COUNTER
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config PM_MCUX_GPC
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default y if HAS_MCUX_GPC
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depends on SOC_SERIES_IMX_RT11XX && PM
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# Don't allow SOC to sleep after tests complete when PM is enabled
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config ZTEST_NO_YIELD
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default y if (ZTEST && PM)
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if SOC_SERIES_IMX_RT10XX && PM
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config CODE_DATA_RELOCATION
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default y
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config PM_MCUX_GPC
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default y if HAS_MCUX_GPC
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config PM_MCUX_DCDC
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default y if HAS_MCUX_DCDC
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config PM_MCUX_PMU
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default y if HAS_MCUX_PMU
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endif # SOC_SERIES_IMX_RT10XX && PM
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if CODE_SEMC
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config FLASH_SIZE
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default $(dt_node_reg_size_int,/memory@80000000,0,K)
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config FLASH_BASE_ADDRESS
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default $(dt_node_reg_addr_hex,/memory@80000000)
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endif # CODE_SEMC
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if CODE_ITCM
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config FLASH_SIZE
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default $(dt_node_reg_size_int,/soc/flexram@40028000/itcm@0,0,K) if SOC_SERIES_IMX_RT11XX
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default $(dt_node_reg_size_int,/soc/flexram@400b0000/itcm@0,0,K) if SOC_SERIES_IMX_RT10XX
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config FLASH_BASE_ADDRESS
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default $(dt_node_reg_addr_hex,/soc/flexram@40028000/itcm@0) if SOC_SERIES_IMX_RT11XX
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default $(dt_node_reg_addr_hex,/soc/flexram@400b0000/itcm@0) if SOC_SERIES_IMX_RT10XX
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endif # CODE_ITCM
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if CODE_SRAM0
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config FLASH_SIZE
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default $(dt_node_reg_size_int,/soc/memory@1ffe0000,0,K)
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config FLASH_BASE_ADDRESS
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default $(dt_node_reg_addr_hex,/soc/memory@1ffe0000)
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endif # CODE_SRAM0
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if CODE_FLEXSPI
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config FLASH_SIZE
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default $(dt_node_reg_size_int,/soc/spi@400cc000,1,K) if SOC_SERIES_IMX_RT11XX
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default $(dt_node_reg_size_int,/soc/spi@402a8000,1,K) if SOC_SERIES_IMX_RT10XX
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config FLASH_BASE_ADDRESS
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default $(dt_node_reg_addr_hex,/soc/spi@400cc000,1) if SOC_SERIES_IMX_RT11XX
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default $(dt_node_reg_addr_hex,/soc/spi@402a8000,1) if SOC_SERIES_IMX_RT10XX
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endif # CODE_FLEXSPI
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if CODE_FLEXSPI2
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config FLASH_SIZE
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default $(dt_node_reg_size_int,/soc/spi@4000d000,1,K) if SOC_SERIES_IMX_RT11XX
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default $(dt_node_reg_size_int,/soc/spi@402a4000,1,K) if SOC_SERIES_IMX_RT10XX
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config FLASH_BASE_ADDRESS
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default $(dt_node_reg_addr_hex,/soc/spi@4000d000,1) if SOC_SERIES_IMX_RT11XX
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default $(dt_node_reg_addr_hex,/soc/spi@402a4000,1) if SOC_SERIES_IMX_RT10XX
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endif # CODE_FLEXSPI2
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config USB_MCUX
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default y
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depends on USB_DEVICE_DRIVER
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choice USB_MCUX_CONTROLLER_TYPE
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default USB_DC_NXP_EHCI
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endchoice
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config DMA_MCUX_EDMA
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default y if HAS_MCUX_EDMA
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depends on DMA
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DT_CHOSEN_Z_DTCM := zephyr,dtcm
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choice SEGGER_RTT_SECTION
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default SEGGER_RTT_SECTION_DTCM if $(dt_chosen_enabled,$(DT_CHOSEN_Z_DTCM))
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depends on USE_SEGGER_RTT
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endchoice
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choice SEGGER_SYSVIEW_SECTION
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default SEGGER_SYSVIEW_SECTION_DTCM if $(dt_chosen_enabled,$(DT_CHOSEN_Z_DTCM))
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depends on SEGGER_SYSTEMVIEW
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endchoice
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#
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# MBEDTLS is larger but much faster than TinyCrypt so choose wisely
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#
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config MBEDTLS
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#config TINYCRYPT
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default y if CSPRING_ENABLED
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depends on ENTROPY_GENERATOR
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if MBEDTLS
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#
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# MBEDTLS CTR_DRBG code path needs extra stack space for initialization than
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# what the ztest_thread_stack defaults to.
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#
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config TEST_EXTRA_STACK_SIZE
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int
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default 1024
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endif # MBEDTLS
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source "soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt*"
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endif # SOC_SERIES_IMX_RT
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