61ef30d10e
Fix the ns16550 uart driver and relevant SoCs accordingly. All generic settings are now DTS based. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
31 lines
1.6 KiB
Text
31 lines
1.6 KiB
Text
#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_9000F000_BASE_ADDRESS
|
|
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_9000F000_CURRENT_SPEED
|
|
#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_9000F000_LABEL
|
|
#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_9000F000_IRQ_0
|
|
#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_9000F000_IRQ_0_PRIORITY
|
|
#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS NS16550_9000F000_IRQ_0_SENSE
|
|
#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_9000F000_CLOCK_FREQUENCY
|
|
|
|
#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_9000B000_BASE_ADDRESS
|
|
#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_9000B000_CURRENT_SPEED
|
|
#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_9000B000_LABEL
|
|
#define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_9000B000_IRQ_0
|
|
#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_9000B000_IRQ_0_PRIORITY
|
|
#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS NS16550_9000B000_IRQ_0_SENSE
|
|
#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ NS16550_9000B000_CLOCK_FREQUENCY
|
|
|
|
#define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
|
|
|
|
#define CONFIG_PHYS_LOAD_ADDR CONFIG_FLASH_BASE_ADDRESS
|
|
|
|
#define CONFIG_RAM_SIZE CONFIG_SRAM_SIZE
|
|
|
|
#define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE
|
|
|
|
#define CONFIG_IOAPIC_BASE_ADDRESS INTEL_IOAPIC_FEC00000_BASE_ADDRESS
|
|
|
|
#define CONFIG_I2C_0_IRQ SNPS_DESIGNWARE_I2C_90007000_IRQ_0
|
|
#define CONFIG_I2C_0_IRQ_FLAGS SNPS_DESIGNWARE_I2C_90007000_IRQ_0_SENSE
|
|
#define CONFIG_I2C_0_BASE_ADDR SNPS_DESIGNWARE_I2C_90007000_BASE_ADDRESS
|
|
#define CONFIG_I2C_0_NAME SNPS_DESIGNWARE_I2C_90007000_LABEL
|
|
#define CONFIG_I2C_0_BITRATE SNPS_DESIGNWARE_I2C_90007000_CLOCK_FREQUENCY
|