607fd149ec
This commit rework stm32f4 series dtsi files hierarchy. stm32f4.dtsi was used as maximum common set of IP while it should be considered as the minimum common subset. Then, following on stm32f4 series hierarchy and inheritance rules, stm32f4xxx.dtsi files are reworked to include the "parent" soc dtsi file and then add own IPs to each SoC. Change-Id: I394278c84a8ea38921f9f143f4fc52ef1c645d05 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
67 lines
1.3 KiB
Text
67 lines
1.3 KiB
Text
/*
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* Copyright (c) 2017 Florian Vaussard, HEIG-VD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/stm32f411.dtsi>
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/ {
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soc {
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usart3: serial@40004800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004800 0x400>;
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interrupts = <39 0>;
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status = "disabled";
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label = "UART_3";
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};
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uart4: serial@40004c00 {
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compatible ="st,stm32-uart";
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reg = <0x40004c00 0x400>;
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interrupts = <52 0>;
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status = "disabled";
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label = "UART_4";
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};
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uart5: serial@40005000 {
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compatible = "st,stm32-uart";
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reg = <0x40005000 0x400>;
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interrupts = <53 0>;
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status = "disabled";
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label = "UART_5";
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};
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uart7: serial@40007800 {
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compatible = "st,stm32-uart";
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reg = <0x40007800 0x400>;
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interrupts = <82 0>;
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status = "disabled";
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label = "UART_7";
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};
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uart8: serial@40007c00 {
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compatible = "st,stm32-uart";
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reg = <0x40007c00 0x400>;
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interrupts = <83 0>;
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status = "disabled";
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label = "UART_8";
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};
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uart9: serial@40011800 {
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compatible = "st,stm32-uart";
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reg = <0x40011800 0x400>;
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interrupts = <88 0>;
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status = "disabled";
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label = "UART_9";
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};
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uart10: serial@40011c00 {
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compatible = "st,stm32-uart";
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reg = <0x40011c00 0x400>;
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interrupts = <89 0>;
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status = "disabled";
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label = "UART_10";
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};
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};
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};
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