4f6b48ee6c
Add support for the RPU, real-time processing unit on Versal Gen 2 SoC. It is based on Cortext-R52 processor. The patch contains initial wiring and configuration for generic board with OCM(1MB) and DDR(2G) memories, cpu, interrupt controller, global timer and UART. versal2.dtsi contains common peripherals integrated into Versal Gen 2 SoC, and versal2_r52.dtsi has peripherals which are private to Cortex-R52 processor. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
28 lines
592 B
C
28 lines
592 B
C
/*
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* Copyright (c) 2025 Advanced Micro Devices, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/cache.h>
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#include <zephyr/device.h>
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#include <zephyr/kernel.h>
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void soc_early_init_hook(void)
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{
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if (IS_ENABLED(CONFIG_ICACHE)) {
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if (!(__get_SCTLR() & SCTLR_I_Msk)) {
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L1C_InvalidateICacheAll();
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__set_SCTLR(__get_SCTLR() | SCTLR_I_Msk);
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barrier_isync_fence_full();
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}
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}
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if (IS_ENABLED(CONFIG_DCACHE)) {
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if (!(__get_SCTLR() & SCTLR_C_Msk)) {
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L1C_InvalidateDCacheAll();
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__set_SCTLR(__get_SCTLR() | SCTLR_C_Msk);
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barrier_dsync_fence_full();
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}
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}
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}
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